Optimized Matrix-Vector Multiplication using AVX-512

AVX-512 optimized matrix-vector multiplication in C, benchmarked on Intel Cascade Lake CPUs. The project compares a scalar baseline against a SIMD vectorized kernel and shows how wider vector registers improve floating-point throughput for large dense matrix-vector workloads.

Results First

Matrix Size	Vector Size	Scalar Baseline	AVX-512 Optimized	Speedup
16 x 16	16	0.003088 ms	0.002773 ms	1.11x
4096 x 4096	4096	46.48076 ms	7.806032 ms	5.95x

The large 4096 x 4096 benchmark achieved the strongest result because the AVX-512 kernel processes 16 single-precision floating-point values per vector operation, allowing the SIMD version to amortize loop overhead and make better use of Cascade Lake vector hardware.

What This Project Demonstrates

• Built a scalar matrix-vector multiplication baseline in C.
• Implemented an AVX-512 optimized kernel using Intel SIMD intrinsics.
• Used _mm512_loadu_ps to load 16 float values at a time.
• Used _mm512_fmadd_ps to fuse multiply-add operations across AVX-512 lanes.
• Used _mm512_reduce_add_ps to reduce vector lanes into each row's dot-product result.
• Benchmarked small and large matrix sizes to compare SIMD benefit at different scales.
• Ran AVX-enabled workloads in a Slurm cluster environment on Cascade Lake CPUs.
• Used srun --constraint=cascadelake to ensure execution on AVX-512 capable hardware.
• Generated assembly output to inspect emitted vector instructions such as vaddps, vmulss, and vmovss.

Implementation Overview

The program computes:

C = A x B

Where:

• A is a dense N x N single-precision floating-point matrix.
• B is a dense vector of length N.
• C is the output vector of length N.

Two kernels are benchmarked:

Kernel	Description
matrix_vector_multiplication	Scalar baseline using nested loops.
matrix_vector_multiplication_AVX	AVX-512 vectorized version using 512-bit SIMD registers.

Repository Layout

.
|-- avx512_matrix_vector_multiplication.c
|-- avx512_matrix_vector_assembly.s
|-- AVX512_Matrix_Vector_Multiplication_Report.pdf
|-- Makefile
`-- README.md

Build and Run

Compile and run:

make run

Generate assembly for instruction-level inspection:

make asmgenerate

The matrix size is controlled by the N macro in avx512_matrix_vector_multiplication.c:

#define N 2048

Change N to benchmark different matrix sizes.

Cascade Lake Cluster Execution

Request an AVX-512 capable Cascade Lake node:

srun -N1 -n 8 -p courses --constraint=cascadelake --pty bash

Run the compiled benchmark:

srun --constraint=cascadelake ./output

Report

See AVX512_Matrix_Vector_Multiplication_Report.pdf for the full benchmark walkthrough, CPU/AVX support verification, console outputs, speedup calculation, and assembly instruction discussion.