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Copy file name to clipboardExpand all lines: docs/guides/cache_modifiers.md
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@@ -6,7 +6,7 @@ Kernel Float exposes these hints through the `kf::cache_modifier` enumeration.
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## The `cache_modifier` enum
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`kf::cache_modifier` mirrors CUDA's `__ldca`/`__ldcg`/`__ldcs`/`__ldlu`/`__ldcv` load intrinsics and `__stwb`/`__stcg`/`__stcs`/`__stwt` store intrinsics:
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`kf::cache_modifier` mirrors CUDA's `__ldca`/`__ldcg`/`__ldcs`/`__ldlu`/`__ldcv`/`__ldg` load intrinsics and `__stwb`/`__stcg`/`__stcs`/`__stwt` store intrinsics:
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| Value | Meaning | Load intrinsic | Store intrinsic |
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|`streaming` (alias `cs`) | Streaming access, data is likely accessed only once |`__ldcs`|`__stcs`|
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|`uncached` (alias `cv`/`wt`) | Bypass caching entirely and always go to memory |`__ldcv`|`__stwt`|
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|`last_use` (alias `lu`) | Last use; the cache line will not be reused (loads only) |`__ldlu`| - |
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|`read_only` (alias `nc`) | Load through the read-only/non-coherent cache (loads only, data must not be written during the kernel) |`__ldg`| - |
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Note that you can use both the short PTX-derived name (`ca`, `cg`, `cs`, `cv`, `wt`, `lu`)
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or a more descriptive alias (`cache_all`, `cache_global`, `streaming`, `uncached`, `last_use`).
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Note that you can use both the short PTX-derived name (`ca`, `cg`, `cs`, `cv`, `wt`, `lu`, `nc`)
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or a more descriptive alias (`cache_all`, `cache_global`, `streaming`, `uncached`, `last_use`, `read_only`).
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`last_use`has no store equivalent (there is no `__stlu`intrinsic), so using it with a store operation silently falls back to a plain, unmodified store.
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`last_use`and `read_only` have no store equivalent (there is no `__stlu`or corresponding store for `__ldg`), so using either with a store operation silently falls back to a plain, unmodified store.
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## Using `read_aligned`/`write_aligned`
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@@ -64,7 +65,7 @@ Cache modifiers are a *hint*, not a guarantee. Kernel Float will attempt to emit
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but will fall back to regular load/store if not possible. There are several cases:
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* The code is not being compiled for a CUDA device (e.g., host or HIP). The cache intrinsics are CUDA-specific.
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* The requested modifier is `normal` (or `last_use` for a store, since it has no store equivalent).
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* The requested modifier is `normal` (or `last_use`/`read_only` for a store, since neither has a store equivalent).
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* The data type being accessed has a size that does not match the supported cache intrinsics (1, 2, 4, 8, or 16 bytes).
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In these cases, the cache hint is ignored and a regular load/store instruction is emitted.
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