Why aren't AVX512 used with Xeon Gold 6132 CPU?

[Raboo]

My CPU has the following features avx512f avx512dq avx512cd avx512bw avx512vl.

Architecture:                x86_64
  CPU op-mode(s):            32-bit, 64-bit
  Address sizes:             46 bits physical, 48 bits virtual
  Byte Order:                Little Endian
CPU(s):                      14
  On-line CPU(s) list:       0-13
Vendor ID:                   GenuineIntel
  Model name:                Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz
    CPU family:              6
    Model:                   85
    Thread(s) per core:      1
    Core(s) per socket:      14
    Socket(s):               1
    Stepping:                4
    CPU(s) scaling MHz:      50%
    CPU max MHz:             3700.0000
    CPU min MHz:             1000.0000
    BogoMIPS:                5200.00
    Flags:                   fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs
                              bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt
                             tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 pti intel_ppin ssbd mba ibrs ibpb stibp tpr_shadow flexpriority ept vpid ept_ad fs
                             gsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 x
                             saves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts vnmi pku ospke md_clear flush_l1d arch_capabilities
Virtualization features:
  Virtualization:            VT-x
Caches (sum of all):
  L1d:                       448 KiB (14 instances)
  L1i:                       448 KiB (14 instances)
  L2:                        14 MiB (14 instances)
  L3:                        19.3 MiB (1 instance)

But I get the following message (AVX512 = 0).

Using automatic RoPE scaling for GGUF. If the model has custom RoPE settings, they'll be used directly instead!
System Info: AVX = 1 | AVX_VNNI = 0 | AVX2 = 1 | AVX512 = 0 | AVX512_VBMI = 0 | AVX512_VNNI = 0 | AVX512_BF16 = 0 | AMX_INT8 = 0 | FMA = 1 | NEON = 0 | SVE = 0 | ARM_FMA = 0 | F16C = 1 | FP16_VA = 0 | RISCV_VECT = 0 | WASM_SIMD = 0 | SSE3 = 1 | SSSE3 = 1 | VSX = 0 | MATMUL_INT8 = 0 | LLAMAFILE = 1 |
CUDA MMQ: False

Are my AVX512 features not enough? Why aren't AVX512 used?

[Maxaubert]

The precompiled/release koboldcpp binaries are built as "portable" builds, and portable builds are capped at AVX2 by design, they never emit AVX512 code even if your CPU supports it.

Look at the Makefile (concedo branch):

koboldcpp/Makefile

Lines 171 to 192 in 4959b8d

	ifeq ($(UNAME_M),$(filter $(UNAME_M),x86_64 i686 amd64))
	ifdef LLAMA_PORTABLE
	SIMPLERCFLAGS += -msse3 -mssse3
	ifdef LLAMA_NOAVX1
	FULLCFLAGS += -msse3 -mssse3
	SIMPLECFLAGS += -msse3 -mssse3
	else
	ifdef LLAMA_NOAVX2
	FULLCFLAGS += -mavx -msse3 -mssse3
	SIMPLECFLAGS += -mavx -msse3 -mssse3
	else
	FULLCFLAGS += -mavx2 -msse3 -mssse3 -mfma -mf16c -mavx
	SIMPLECFLAGS += -mavx -msse3 -mssse3
	endif # LLAMA_NOAVX2
	endif # LLAMA_NOAVX1
	else
	CFLAGS += -march=native -mtune=native
	SIMPLECFLAGS += -march=native -mtune=native
	SIMPLERCFLAGS += -march=native -mtune=native
	FULLCFLAGS += -march=native -mtune=native
	endif # LLAMA_PORTABLE
	endif # if x86

ifeq ($(UNAME_M),$(filter $(UNAME_M),x86_64 i686 amd64))
ifdef LLAMA_PORTABLE
...
FULLCFLAGS += -mavx2 -msse3 -mssse3 -mfma -mf16c -mavx
SIMPLECFLAGS += -mavx -msse3 -mssse3
...
else
CFLAGS += -march=native -mtune=native
SIMPLECFLAGS += -march=native -mtune=native
SIMPLERCFLAGS += -march=native -mtune=native
FULLCFLAGS += -march=native -mtune=native
endif # LLAMA_PORTABLE
endif # if x86

When LLAMA_PORTABLE is defined, the highest SIMD level the compiler is ever told to target is AVX2/FMA/F16C, so the resulting binary has no AVX512 codepath compiled in at all, regardless of what your Xeon Gold 6132 supports. Only when LLAMA_PORTABLE is not set does the build fall back to -march=native -mtune=native, letting the compiler autodetect and use everything your CPU exposes, including AVX512F/DQ/CD/BW/VL.

And the official release binaries are all built with LLAMA_PORTABLE=1 so they work on any machine, not just the build machine:

• Windows release:

  koboldcpp/.github/workflows/kcpp-build-release-win.yaml

  Line 99 in 4959b8d

  make LLAMA_VULKAN=1 LLAMA_PORTABLE=1 -j ${env:NUMBER_OF_PROCESSORS}

  runs make LLAMA_VULKAN=1 LLAMA_PORTABLE=1 ...
• Linux release:

  koboldcpp/.github/workflows/kcpp-build-release-linux.yaml

  Line 15 in 4959b8d

  KCPP_PORTABLE: 1

  sets KCPP_PORTABLE: 1, which koboldcpp.sh turns into the same LLAMA_PORTABLE=1 make flag.

The AVX512 = 0 you see at startup comes straight from this: ggml_cpu_has_avx512() in ggml/src/ggml-cpu/ggml-cpu.c just checks the compiler macro __AVX512F__, which is only defined if the binary was actually compiled with an AVX512 flag. It's not a runtime CPU check, so it's not misreading your CPU, it's reporting that this specific binary was never compiled with AVX512 support at all.

So this isn't a detection bug, it's a build-time limitation: the shipped binary simply wasn't compiled to use AVX512, no matter what your CPU supports. If you want AVX512, you'd need to build from source yourself without setting LLAMA_PORTABLE (or KCPP_PORTABLE), e.g. plain make LLAMA_VULKAN=1 on your machine, so the Makefile takes the -march=native path instead.

[LostRuins]

To add on: AVX512 was tested by some early on and found to be not significantly faster. Because of the very low support for the instruction set in general, it was not added.