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fix: add missing private clauses for GPU offload; disable ZFP in silo build
- Add h_iL, h_iR, h_avg_2 and other chemistry locals to private clauses of two GPU_PARALLEL_LOOP regions in s_hllc_riemann_solver (lines 2201, 2421) where they were declared at subroutine scope but not privatized, causing nvfortran 25.1 gpu-omp to fail with 'Could not find allocated-variable index for symbol - h_il' - Disable ZFP compression in silo (-DSILO_ENABLE_ZFP=OFF) since MFC never uses it and nvc crashes compiling zfp/decode1d.c on 23.11/25.3 - Pin silo to 4.12.0 tag with GIT_SHALLOW; clean up HDF5 build flags
1 parent 5e8b22b commit 65bc2f8

2 files changed

Lines changed: 10 additions & 4 deletions

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src/simulation/m_riemann_solvers.fpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2205,7 +2205,8 @@ contains
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& G_L, G_R, rho_avg, H_avg, c_avg, gamma_avg, ptilde_L, ptilde_R, vel_L_rms, vel_R_rms, &
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& vel_avg_rms, vel_L_tmp, vel_R_tmp, Ms_L, Ms_R, pres_SL, pres_SR, alpha_L_sum, &
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& alpha_R_sum, rho_Star, E_Star, p_Star, p_K_Star, vel_K_star, s_L, s_R, s_M, s_P, s_S, &
2208-
& xi_M, xi_P, xi_L, xi_R, xi_MP, xi_PP]')
2208+
& xi_M, xi_P, xi_L, xi_R, xi_MP, xi_PP, Ys_L, Ys_R, Cp_iL, Cp_iR, Xs_L, Xs_R, &
2209+
& Gamma_iL, Gamma_iR, Yi_avg, Phi_avg, h_iL, h_iR, h_avg_2]')
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do l = is3%beg, is3%end
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do k = is2%beg, is2%end
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do j = is1%beg, is1%end
@@ -2423,7 +2424,8 @@ contains
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& qv_R, qv_avg, c_L, c_R, c_avg, vel_L_rms, vel_R_rms, vel_avg_rms, vel_L_tmp, vel_R_tmp, &
24242425
& Ms_L, Ms_R, pres_SL, pres_SR, alpha_L_sum, alpha_R_sum, s_L, s_R, s_M, s_P, s_S, xi_M, &
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& xi_P, xi_L, xi_R, xi_MP, xi_PP, nbub_L, nbub_R, PbwR3Lbar, PbwR3Rbar, R3Lbar, R3Rbar, &
2426-
& R3V2Lbar, R3V2Rbar]')
2427+
& R3V2Lbar, R3V2Rbar, Ys_L, Ys_R, Cp_iL, Cp_iR, Xs_L, Xs_R, Gamma_iL, Gamma_iR, &
2428+
& Yi_avg, Phi_avg, h_iL, h_iR, h_avg_2]')
24272429
do l = is3%beg, is3%end
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do k = is2%beg, is2%end
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do j = is1%beg, is1%end

toolchain/dependencies/CMakeLists.txt

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -61,11 +61,13 @@ if (MFC_HDF5)
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GIT_PROGRESS ON
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CMAKE_ARGS "-DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX}"
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-DBUILD_SHARED_LIBS=OFF
64-
-DFORTRAN_LIBRARIES=ON
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-DBUILD_TESTING=OFF
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-DHDF5_BUILD_UTILS=OFF
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-DHDF5_BUILD_TOOLS=ON
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-DHDF5_BUILD_EXAMPLES=OFF
68+
-DHDF5_BUILD_CPP_LIB=OFF
69+
-DHDF5_BUILD_FORTRAN=OFF
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-DHDF5_ENABLE_PARALLEL=OFF
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)
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endif()
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endif()
@@ -82,13 +84,15 @@ if (MFC_SILO)
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ExternalProject_Add(silo
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GIT_REPOSITORY "https://github.com/LLNL/Silo"
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GIT_TAG 0cddaa6865fb49ae7b2110fa1b6f2709592abe0b
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GIT_TAG 4.12.0
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GIT_SHALLOW ON
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GIT_PROGRESS ON
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PATCH_COMMAND "${GIT_EXECUTABLE}" stash
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&& "${GIT_EXECUTABLE}" apply "${CMAKE_SOURCE_DIR}/Silo.patch"
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CMAKE_ARGS -DSILO_ENABLE_SHARED=OFF
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-DSILO_ENABLE_SILOCK=OFF
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-DSILO_ENABLE_BROWSER=OFF
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-DSILO_ENABLE_ZFP=OFF
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-DFIND_LIBRARY_USE_LIB64_PATHS=ON
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"-DCMAKE_PREFIX_PATH=${CMAKE_PREFIX_PATH}"
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"-DCMAKE_FIND_ROOT_PATH=${CMAKE_FIND_ROOT_PATH}"

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