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perf(nemotron): enable CuteDSL fusion for VR200 MXFP8
Signed-off-by: Malay Nagda <malayn@nvidia.com>
1 parent d0debd0 commit da1e1a6

2 files changed

Lines changed: 24 additions & 2 deletions

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‎src/megatron/bridge/perf_recipes/nemotronh/vr200/nemotronh.py‎

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@@ -59,6 +59,9 @@ def nemotron_3_nano_pretrain_8gpu_vr200_bf16_config() -> ConfigContainer:
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def nemotron_3_nano_pretrain_8gpu_vr200_fp8mx_config() -> ConfigContainer:
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"""Nemotron 3 Nano pretrain: 8× VR200, FP8-MX (alias of GB300)."""
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cfg = _build_nemotron_3_nano_gb300_mxfp8()
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cfg.model.use_transformer_engine_op_fuser = True
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cfg.model.moe_mlp_glu_interleave_size = 32
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cfg.mixed_precision.fp8_dot_product_attention = True
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# Keep process settings next to the recipe so users can see the exact benchmark environment.
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cfg.env_vars = {
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**COMMON_PERF_ENV_VARS,
@@ -76,7 +79,9 @@ def nemotron_3_nano_pretrain_8gpu_vr200_fp8mx_config() -> ConfigContainer:
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"NVLINK_DOMAIN_SIZE": 72,
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"USE_MNNVL": 1,
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# Transformer Engine overlap settings for this model.
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"CUDNNFE_CLUSTER_OVERLAP_MARGIN": 8,
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"NVTE_BWD_LAYERNORM_SM_MARGIN": 20,
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"NVTE_CUTEDSL_FUSED_GROUPED_MLP": 1,
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"NVTE_FWD_LAYERNORM_SM_MARGIN": 20,
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# Use cuDNN LayerNorm for this measured baseline.
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"NVTE_NORM_BWD_USE_CUDNN": 1,
@@ -145,6 +150,9 @@ def nemotron_3_super_pretrain_64gpu_vr200_bf16_config() -> ConfigContainer:
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def nemotron_3_super_pretrain_64gpu_vr200_fp8mx_config() -> ConfigContainer:
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"""Nemotron 3 Super pretrain: 64× VR200, FP8-MX (alias of GB300)."""
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cfg = _build_nemotron_3_super_gb300_mxfp8()
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cfg.model.use_transformer_engine_op_fuser = True
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cfg.model.moe_mlp_glu_interleave_size = 32
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cfg.mixed_precision.fp8_dot_product_attention = True
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# Keep process settings next to the recipe so users can see the exact benchmark environment.
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cfg.env_vars = {
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**COMMON_PERF_ENV_VARS,
@@ -162,7 +170,9 @@ def nemotron_3_super_pretrain_64gpu_vr200_fp8mx_config() -> ConfigContainer:
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"NVLINK_DOMAIN_SIZE": 72,
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"USE_MNNVL": 1,
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# Transformer Engine overlap settings for this model.
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"CUDNNFE_CLUSTER_OVERLAP_MARGIN": 8,
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"NVTE_BWD_LAYERNORM_SM_MARGIN": 20,
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"NVTE_CUTEDSL_FUSED_GROUPED_MLP": 1,
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"NVTE_FWD_LAYERNORM_SM_MARGIN": 20,
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}
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return cfg

‎tests/unit_tests/recipes/test_nemotronh_recipes.py‎

Lines changed: 14 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -179,6 +179,12 @@ def test_nemotron_3_nano_gb200_defers_vocab_size_to_training_tokenizer():
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True,
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id="nano-gb300",
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),
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pytest.param(
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"megatron.bridge.perf_recipes.nemotronh.vr200.nemotronh",
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"nemotron_3_nano_pretrain_8gpu_vr200_fp8mx_config",
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True,
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id="nano-vr200",
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),
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pytest.param(
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"megatron.bridge.perf_recipes.nemotronh.gb200.nemotronh",
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"nemotron_3_super_pretrain_64gpu_gb200_fp8mx_config",
@@ -191,14 +197,20 @@ def test_nemotron_3_nano_gb200_defers_vocab_size_to_training_tokenizer():
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False,
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id="super-gb300",
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),
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pytest.param(
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"megatron.bridge.perf_recipes.nemotronh.vr200.nemotronh",
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"nemotron_3_super_pretrain_64gpu_vr200_fp8mx_config",
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False,
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id="super-vr200",
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),
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],
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)
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def test_nemotron_3_gb_mxfp8_perf_recipes_enable_cutedsl_fusion(
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def test_nemotron_3_mxfp8_perf_recipes_enable_cutedsl_fusion(
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module_name: str,
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factory_name: str,
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has_comm_overlap: bool,
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) -> None:
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"""GB MXFP8 recipes match the measured CutDSL and MoE overlap settings."""
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"""Selected MXFP8 recipes match the measured CutDSL and MoE overlap settings."""
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module = importlib.import_module(module_name)
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cfg = getattr(module, factory_name)()
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