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[TRTLLM-16749][feat] Add MiniMax-H3 text encoder TP support - #19807
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@pengbowang-nv, could you help to review this PR as trt-llm-torch-attention-devs? Thanks~ Assignment explanation
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Review comments at
@tensorrt_llm/_torch/visual_gen/models/minimax_h3/pipeline_minimax_h3.py:
- Around line 213-224: In the MiniMax-H3 pipeline initialization, reject
text-encoder tensor parallelism when 1 < text_encoder_tp_size < world_size and
MPI is enabled, before the dist.new_group call. Use
_uses_tensor_parallel_text_encoder and the existing MPI configuration check so
all ranks fail uniformly; leave full-world and non-MPI configurations unchanged.
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docs/source/models/supported-models.mddocs/source/models/visual-generation.mdtensorrt_llm/_torch/attention/attention.pytensorrt_llm/_torch/distributed/ops.pytensorrt_llm/_torch/models/modeling_qwen3.pytensorrt_llm/_torch/modules/embedding.pytensorrt_llm/_torch/visual_gen/checkpoints/weight_loader.pytensorrt_llm/_torch/visual_gen/models/minimax_h3/pipeline_minimax_h3.pytensorrt_llm/_torch/visual_gen/models/minimax_h3/ref2va.pytensorrt_llm/_torch/visual_gen/models/minimax_h3/text_encoder_tp.pytensorrt_llm/mapping.pytensorrt_llm/visual_gen/args.pytests/unittest/_torch/visual_gen/test_minimax_h3_pipeline.pytests/unittest/_torch/visual_gen/test_visual_gen_args.py
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pengbowang-nv
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The change to attention is good, but a mapping issue (see comment in mapping.py) exists preventing the code to function. Approve from attention perspective to unblock. Please fix the thread before moving to merge.
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Reproduce the CI mismatch on GB100 after a clean build. Layer-50 relative L2 error versus HF is 2.51% for TP1 and 2.63% for TP2 on the one-token case; sequence lengths 7 and 19 show comparable drift. Bound aggregate error at 3% and absolute outliers at 0.08 while adding a tighter first-layer comparison. Retain exact projection shard and process-group checks. Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>
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Dev Engineer Review
The change adds MiniMax-H3 text-encoder tensor parallelism. Participating ranks load the sharded Qwen3 encoder; other ranks receive embeddings by broadcast. The pipeline limits DiT TP to 1 and rejects keyframe or vision-input requests when text-encoder TP is enabled. Subgroup creation for subset TP requires
TLLM_DISABLE_MPI=1.The change also adds TP process-group routing, a
torch.distributedall-reduce fallback, and anallreduce_strategyargument forLMHeadandEmbedding. Verify the subgroup, collective, and existing-caller paths. The pipeline now rejects all-zero or non-finite denoising velocities to avoid blank output; verify this guard does not reject valid output.The supplied CI history reports successful PR_Github runs, failed L0 pipelines, and aborted runs. It does not identify failure causes, so overall validation remains unresolved.
QA Engineer Review
Changed tests cover parallel configuration, encoder residency and subgroup behavior, input restrictions, embedding broadcast, shard and hidden-state equivalence, and TP=2 versus TP=1 video and audio output. The integration test is listed for two- and four-GPU B200 pre-merge runs in
tests/integration/test_lists/test-db/l0_dgx_b200.yml. No manual-QA list evidence is supplied.Coverage verdict: needs follow-up. Distributed and integration coverage is present, but the supplied CI history includes failures with unknown causes.
Per-File QA Perspective
docs/source/models/supported-models.md: Adds a Text Encoder TP column and marks MiniMax-H3 as supported. Verify the matrix matches runtime support.docs/source/models/visual-generation.md: Documents text-encoder TP and MiniMax-H3 constraints. Verify the rank and input guidance matches runtime behavior.tensorrt_llm/_torch/attention/attention.py: Propagates TP process-group and all-reduce routing attributes to derived mappings. Verify both mappings use the intended group.tensorrt_llm/_torch/distributed/ops.py: Adds atorch.distributedfallback for plain all-reduce and rejects unsupported operations or auxiliary arguments. Verify routing and error paths.tensorrt_llm/_torch/models/modeling_qwen3.py: Passes the configured all-reduce strategy to the token embedding layer. Verify existing Qwen3 configurations retain expected behavior.tensorrt_llm/_torch/modules/embedding.py: Addsallreduce_strategyarguments toLMHeadandEmbedding. Verify caller compatibility and defaults.tensorrt_llm/_torch/visual_gen/checkpoints/weight_loader.py: Adds a prefetch control and limits prefetching to safetensors files. Verify enabled, disabled, and other-format paths.tensorrt_llm/_torch/visual_gen/models/minimax_h3/pipeline_minimax_h3.py: Adds TP encoder loading, subgroup selection, embedding broadcast, text-only restrictions, and denoising-velocity checks. Verify rank behavior, configuration errors, collectives, and the output guard.tensorrt_llm/_torch/visual_gen/models/minimax_h3/ref2va.py: Routes reference text through_encode_reference_text_tokens. Verify reference prompts with and without TP.tensorrt_llm/_torch/visual_gen/models/minimax_h3/text_encoder_tp.py: Adds the TP Qwen3 encoder, weight filtering and remapping, and hidden-state encoding. Verify shard mapping and output equivalence against the reference encoder.tensorrt_llm/mapping.py: Returns a cached TP process group when available. Verify cached and unavailable-group behavior.tensorrt_llm/visual_gen/args.py: Addstext_encoder_tp_size, defaulting to 1, and validates it against world size. Verify default and invalid-size handling.tensorrt_llm/_torch/device_mesh.py: Uses a cached TP process group before accessing or building the device mesh. Verify cache and mesh initialization paths.tests/unittest/_torch/visual_gen/test_minimax_h3_pipeline.py: Covers rank residency, subgroup behavior, prefetch, input restrictions, broadcast, and unsupported DiT TP. No entry for this test file appears in the suppliedtest-dbchanges.tests/unittest/_torch/visual_gen/test_visual_gen_args.py: Covers worker-count behavior andtext_encoder_tp_sizevalidation. No entry for this test file appears in the suppliedtest-dbchanges.tests/unittest/_torch/visual_gen/multi_gpu/test_minimax_h3_text_encoder_tp.py: Compares TP shards and encoder hidden states with a Qwen3-VL reference across sequence lengths and rank layouts. The two- and four-rank test IDs are listed inl0_dgx_b200.yml.tests/integration/defs/examples/visual_gen/test_visual_gen_multi_gpu.py: Compares TP=2 output with TP=1 using video LPIPS and audio log-STFT thresholds at world sizes 2 and 4. Both test IDs are listed inl0_dgx_b200.yml.tests/integration/test_lists/test-db/l0_dgx_b200.yml: Adds the MiniMax-H3 text-encoder TP unit and integration test entries for two- and four-GPU B200 pre-merge runs. Verify CI selection and timeout behavior.Description
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