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9 | 9 |
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10 | 10 | #include <platform_override.h> |
11 | 11 | #include <sbi/riscv_asm.h> |
| 12 | +#include <sbi/sbi_bitops.h> |
| 13 | +#include <sbi/sbi_console.h> |
12 | 14 | #include <sbi_utils/fdt/fdt_helper.h> |
13 | 15 | #include <sbi_utils/fdt/fdt_fixup.h> |
| 16 | +#include <libfdt.h> |
14 | 17 |
|
15 | 18 | extern unsigned long clint_offset_quirk; |
| 19 | +static uint32_t guest_index_bits = 0; |
| 20 | +static uint32_t hw_smsi_align_bits = 0; |
| 21 | + |
16 | 22 | static const struct fdt_match nuclei_evalsoc_match[] = { |
17 | 23 | { .compatible = "nuclei,evalsoc" }, |
18 | 24 | { .compatible = "nuclei,eval-soc" }, |
19 | 25 | { .compatible = "nuclei,placeholder" }, |
20 | 26 | { }, |
21 | 27 | }; |
22 | 28 |
|
| 29 | +static int nuclei_evalsoc_get_geilen(void) |
| 30 | +{ |
| 31 | + int val; |
| 32 | + |
| 33 | + if (!misa_extension('H')) |
| 34 | + return 0; |
| 35 | + csr_write(CSR_HGEIE, -1UL); |
| 36 | + val = sbi_fls(csr_read(CSR_HGEIE)); |
| 37 | + csr_write(CSR_HGEIE, 0); |
| 38 | + |
| 39 | + return val; |
| 40 | +} |
| 41 | + |
| 42 | +static void fdt_imsic_guest_index_fixup(void *fdt) |
| 43 | +{ |
| 44 | + int offset, len, i; |
| 45 | + const uint32_t *prop; |
| 46 | + |
| 47 | + if (!fdt) |
| 48 | + return; |
| 49 | + |
| 50 | + offset = -1; |
| 51 | + for (i = 0; i < 2; i++) { |
| 52 | + offset = fdt_node_offset_by_compatible(fdt, offset, "riscv,imsics"); |
| 53 | + if (offset < 0) { |
| 54 | + return; |
| 55 | + } |
| 56 | + |
| 57 | + prop = fdt_getprop(fdt, offset, "riscv,guest-index-bits", &len); |
| 58 | + if (prop) { |
| 59 | + break; |
| 60 | + } |
| 61 | + } |
| 62 | + if (!prop) |
| 63 | + return; |
| 64 | + guest_index_bits = fdt32_to_cpu(*prop); |
| 65 | + /* |
| 66 | + * hw_smsi_align_bits = upper(log2(GEILEN+1)), |
| 67 | + * if GEILEN=3 then hw_smsi_align_bits=2, |
| 68 | + * if GEILEN=4 then hw_smsi_align_bits=3. |
| 69 | + */ |
| 70 | + hw_smsi_align_bits = sbi_fls(nuclei_evalsoc_get_geilen()) + 1; |
| 71 | + if (guest_index_bits != hw_smsi_align_bits) { |
| 72 | + fdt_setprop_u32(fdt, offset, "riscv,guest-index-bits", hw_smsi_align_bits); |
| 73 | + } |
| 74 | +} |
| 75 | + |
23 | 76 | static int nuclei_evalsoc_final_init(bool cold_boot, |
24 | 77 | const struct fdt_match *match) |
25 | 78 | { |
26 | 79 | if (cold_boot) { // Add cold boot initial steps |
| 80 | + /* |
| 81 | + * on nuclei_evalsoc_early_init stage, console has not been initialized, |
| 82 | + * if need to update dts riscv,guest-index-bits prop, print related info here. |
| 83 | + */ |
| 84 | + if (guest_index_bits != hw_smsi_align_bits) { |
| 85 | + sbi_printf("Warning: dts prop riscv,guest-index-bits " |
| 86 | + "does not match with HW parameter GEILEN.\n"); |
| 87 | + sbi_printf("Now update dts prop riscv,guest-index-bits " |
| 88 | + "from %d to %d to adapt HW.\n", guest_index_bits, hw_smsi_align_bits); |
| 89 | + sbi_printf("More details refer to https://github.com/" |
| 90 | + "Nuclei-Software/nuclei-linux-sdk/issues/36.\n"); |
| 91 | + } |
27 | 92 | } |
28 | 93 |
|
29 | 94 | // Check mcfg_info.tee to see whether tee present |
@@ -59,6 +124,13 @@ static int nuclei_evalsoc_early_init(bool cold_boot, |
59 | 124 | */ |
60 | 125 | clint_offset_quirk = 0x1000; |
61 | 126 |
|
| 127 | + if (cold_boot) { |
| 128 | + void *fdt; |
| 129 | + |
| 130 | + fdt = fdt_get_address(); |
| 131 | + fdt_imsic_guest_index_fixup(fdt); |
| 132 | + } |
| 133 | + |
62 | 134 | return 0; |
63 | 135 | } |
64 | 136 |
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