SoC/evalsoc: fix UART stop-bit and watermark configuration

Related to Github issue #68

Correct control-register masks without clearing unrelated fields.

Co-authored-by: KafCoppelia <k740677208@gmail.com>

Signed-off-by: Jiandong Qiu <qiujiandong@nucleisys.com>

Author: fanghuaqi

SoC/evalsoc/Common/Source/Drivers/evalsoc_uart.c

@@ -18,8 +18,8 @@ int32_t uart_config_stopbit(UART_TypeDef* uart, UART_STOP_BIT stopbit)
         return -1;
     }
     uint32_t stopval = stopbit;
-    stopval = (stopbit << UART_TXCTRL_NSTOP_OFS) & UART_TXCTRL_TXCNT_MASK;
-    uart->TXCTRL &= stopval | (~UART_TXCTRL_TXCNT_MASK);
+    stopval = (stopval << UART_TXCTRL_NSTOP_OFS) & UART_TXCTRL_NSTOP_MASK;
+    uart->TXCTRL = stopval | (~UART_TXCTRL_NSTOP_MASK & uart->TXCTRL);
     return 0;
 }
 
@@ -51,7 +51,7 @@ int32_t uart_set_tx_watermark(UART_TypeDef* uart, uint32_t watermark)
         return -1;
     }
     watermark = (watermark << UART_TXCTRL_TXCNT_OFS) & UART_TXCTRL_TXCNT_MASK;
-    uart->TXCTRL &= watermark | (~UART_TXCTRL_TXCNT_MASK);
+    uart->TXCTRL = watermark | (~UART_TXCTRL_TXCNT_MASK & uart->TXCTRL);
     return 0;
 }
 
@@ -79,7 +79,7 @@ int32_t uart_set_rx_watermark(UART_TypeDef* uart, uint32_t watermark)
         return -1;
     }
     watermark = (watermark << UART_RXCTRL_RXCNT_OFS) & UART_RXCTRL_RXCNT_MASK;
-    uart->RXCTRL &= watermark | (~UART_RXCTRL_RXCNT_MASK);
+    uart->RXCTRL = watermark | (~UART_RXCTRL_RXCNT_MASK & uart->RXCTRL);
     return 0;
 }
 

doc/source/changelog.rst

@@ -3,6 +3,15 @@
 Changelog
 =========
 
+V0.4.0-dev
+----------
+
+This is release version of ``0.4.0`` of N100 SDK, which is still under development.
+
+* SoC
+
+  - Fix EvalSoC UART stop-bit and FIFO watermark configuration to update the intended control-register fields.
+
 V0.3.0
 ------