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NMSIS/Core: Add S-mode ECLIC interrupt pending control APIs and update changelog
- Add ECLIC_SetPendingIRQ_S, ECLIC_GetPendingIRQ_S and ECLIC_ClearPendingIRQ_S APIs for supervisor mode interrupt pending control - Include proper function documentation with parameter descriptions and usage references - These functions allow managing interrupt pending state in supervisor mode using the SCTRL registers with INTIP bit manipulation - Update changelog.rst to document the new S-mode ECLIC interrupt pending control APIs Signed-off-by: Huaqi Fang <578567190@qq.com>
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NMSIS/Core/Include/core_feature_eclic.h

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@@ -281,6 +281,9 @@ typedef enum IRQn {
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#define ECLIC_SetModeIRQ __ECLIC_SetModeIRQ
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#define ECLIC_SetSth __ECLIC_SetSth
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#define ECLIC_GetSth __ECLIC_GetSth
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#define ECLIC_SetPendingIRQ_S __ECLIC_SetPendingIRQ_S
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#define ECLIC_GetPendingIRQ_S __ECLIC_GetPendingIRQ_S
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#define ECLIC_ClearPendingIRQ_S __ECLIC_ClearPendingIRQ_S
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#define ECLIC_SetTrigIRQ_S __ECLIC_SetTrigIRQ_S
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#define ECLIC_GetTrigIRQ_S __ECLIC_GetTrigIRQ_S
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#define ECLIC_SetShvIRQ_S __ECLIC_SetShvIRQ_S
@@ -1124,6 +1127,58 @@ __STATIC_FORCEINLINE uint8_t __ECLIC_GetSth(void)
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return (ECLIC->STH);
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}
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/**
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* \brief Set a specific interrupt to pending in supervisor mode
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* \details
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* This function sets the pending bit for the specific interrupt \em IRQn in supervisor mode.
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* \param [in] IRQn Interrupt number
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* \remarks
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* - IRQn must not be negative.
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* \sa
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* - \ref ECLIC_GetPendingIRQ_S
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* - \ref ECLIC_ClearPendingIRQ_S
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*/
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__STATIC_FORCEINLINE void __ECLIC_SetPendingIRQ_S(IRQn_Type IRQn)
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{
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ECLIC->SCTRL[IRQn].INTIP |= CLIC_INTIP_IP_Msk;
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}
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/**
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* \brief Get the pending specific interrupt in supervisor mode
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* \details
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* This function returns the pending status of the specific interrupt \em IRQn in supervisor mode.
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* \param [in] IRQn Interrupt number
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* \returns
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* - 0 Interrupt is not pending
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* - 1 Interrupt is pending
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* \remarks
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* - IRQn must not be negative.
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* \sa
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* - \ref ECLIC_SetPendingIRQ_S
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* - \ref ECLIC_ClearPendingIRQ_S
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*/
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__STATIC_FORCEINLINE int32_t __ECLIC_GetPendingIRQ_S(IRQn_Type IRQn)
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{
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return ((uint32_t)(ECLIC->SCTRL[IRQn].INTIP) & CLIC_INTIP_IP_Msk);
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}
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/**
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* \brief Clear a specific interrupt from pending in supervisor mode
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* \details
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* This function removes the pending state of the specific interrupt \em IRQn in supervisor mode.
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* \em IRQn cannot be a negative number.
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* \param [in] IRQn Interrupt number
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* \remarks
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* - IRQn must not be negative.
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* \sa
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* - \ref ECLIC_SetPendingIRQ_S
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* - \ref ECLIC_GetPendingIRQ_S
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*/
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__STATIC_FORCEINLINE void __ECLIC_ClearPendingIRQ_S(IRQn_Type IRQn)
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{
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ECLIC->SCTRL[IRQn].INTIP &= ~CLIC_INTIP_IP_Msk;
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}
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/**
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* \brief Set trigger mode and polarity for a specific interrupt in supervisor mode
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* \details
@@ -1686,6 +1741,7 @@ __STATIC_INLINE uint64_t __ECLIC_GetShadowLevelReg_S(void)
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}
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#endif
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#endif /* defined(__TEE_PRESENT) && (__TEE_PRESENT == 1) */
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/**

doc/source/changelog.rst

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@@ -23,6 +23,7 @@ This is release version of ``0.9.0`` of Nuclei SDK, which is still under develop
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- Add ECLICv2 shadow register level APIs ``ECLIC_SetShadowLevel`` and ``ECLIC_GetShadowLevel`` in ``core_feature_eclic.h``
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- Add ECLICv2 s-mode shadow register level APIs ``ECLIC_SetShadowLevel_S`` and ``ECLIC_GetShadowLevel_S`` for TEE in ``core_feature_eclic.h``
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- Add ECLICv2 shadow register level register APIs ``ECLIC_SetShadowLevelReg``/``ECLIC_GetShadowLevelReg`` and ``ECLIC_SetShadowLevelReg_S``/``ECLIC_GetShadowLevelReg_S`` in ``core_feature_eclic.h``
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- Add new S-mode ECLIC interrupt pending control APIs ``ECLIC_SetPendingIRQ_S``, ``ECLIC_GetPendingIRQ_S`` and ``ECLIC_ClearPendingIRQ_S`` in ``core_feature_eclic.h``
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- Fix **HDBG** bit position in SysTimer **MTIMECTL** from 4 to 3 in ``core_feature_timer.h``
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- Add **MTIME_SRC** bit position and update SRW control handling in ``core_feature_timer.h``
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- Add new field mapping of ``CSR_MTLBCFGINFO_Type`` CSR structure in ``core_feature_base.h``

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