@@ -1,6 +1,15 @@
 # PyBLE — `esp32-c3-4mb` engineering qualification
 
 Status: **C3-G0–C3-G7 FROZEN (`[docs]` 2026-08-12); all results PENDING**.
+
+**Status clarification — 25 September 2026:** the line above records the
+original engineering freeze. v0.6.0 subsequently became the qualified
+five-profile baseline. v0.6.1 is publicly distributed under the dated
+[owner-confirmed publication](../../../testing/firmware-v0.6.1-publication-2026-09-11.md),
+whose incomplete automated HIL records remain unchanged. These normative gates
+still govern a fresh automated-qualified C3/candidate claim; this note adds no
+new passing result and does not rewrite the historical freeze.
+
 This is the derived engineering contract for the existing ESP32-family native
 agent on one matching physical reference. It implements
 [ADR-0032](../../../decisions/0032-qualify-generic-esp32-c3-4mb-on-reference-hardware.md)
 
@@ -2,6 +2,14 @@
 
 Status: **P1–P9 FROZEN (v0.6.1 hardening amended 2026-09-02)**; P10 gates and P11 open items are living, and every new v0.6.1 result remains **PENDING**. Derived per [firmware/specs.md §1.1](../specs.md); [ADR-0030](../../../decisions/0030-pico2w-portable-python-agent-first.md) records the portable-Python-first deviation, while [ADR-0033](../../../decisions/0033-qualify-v060-as-five-profile-heterogeneous-release.md) defines only the historical heterogeneous v0.6.0 release admission. Cited upstream facts refer to the pinned MicroPython v1.28.0 submodule.
 
+**Publication clarification — 25 September 2026:** v0.6.1 is publicly available
+under the dated [owner-confirmed publication](../../../testing/firmware-v0.6.1-publication-2026-09-11.md).
+Its incomplete automated qualification records remain unchanged. References
+below to pending qualification or a qualified selector concern standard
+automated-qualified admission, not the existence of that owner-confirmed
+distribution. v0.6.0 remains the historical qualified baseline; this note
+supplies no new GP2 or physical result and changes no gate.
+
 ## P1. Identity & caps (FROZEN)
 
 - `chip` token: **`rpi-pico2-w`** (protocol.md §7 open identifier; ADR-0021 — no protocol amendment needed, additive under §9).
 
@@ -58,9 +58,13 @@ different flash size or Quad/no PSRAM, are not covered by
 Matching the N16R8 memory tuple also does not imply that an onboard display or
 other peripheral exists. The Waveshare row is separate even though ESP Web
 Tools reports the same family for both S3 images and cannot distinguish them.
-All five qualified v0.6.0 profiles are active. Their source-selected v0.6.1
-successors remain unavailable while fresh exact-byte qualification is pending;
-owning or building a target is not a substitute for candidate-bound HIL. The
+All five qualified v0.6.0 profiles remain the historical automated-qualified
+baseline. As recorded in the
+[11 September 2026 publication report](../testing/firmware-v0.6.1-publication-2026-09-11.md),
+all five v0.6.1 profiles are publicly available through the explicitly
+owner-confirmed release mode. Their incomplete automated HIL evidence remains
+unchanged; availability does not establish a fresh automated-qualified pass.
+Owning or building a target is not a substitute for candidate-bound HIL. The
 ESP32-C3-MINI-1-N4 v0.4/4 MiB/no-PSRAM module remains the selected physical
 engineering reference for that generic profile. Its gates passed for v0.6.0
 and must be rerun for v0.6.1 under
@@ -76,7 +80,9 @@ not qualify v0.6.0. The atomic five-profile v0.6.0 release selected by ADR-0033
 generated and passed its schema-3 resource policy and V5 HIL evidence for every
 row. Pre-split or earlier-candidate evidence did not qualify it and cannot
 qualify v0.6.1. C3-G0…C3-G6 and Pico GP2 remain mandatory for the fresh v0.6.1
-candidate; either pending or failed profile blocks that entire increment.
+candidate; either pending or failed profile blocks standard automated-qualified
+admission of that entire increment. The dated owner-confirmed publication is
+not a waiver for a future candidate or a PyBLE Ready qualification claim.
 
 These are **provisioning image profiles**, not board-routing profiles. They
 exist solely to keep destructive flash layouts honest. They do not define GPIO
 
@@ -8,6 +8,13 @@ firmware-test-author**; none of this ships in the firmware image.
 A milestone gate is green **only on a real-hardware HIL demo**, not on merged
 code (PRD §1B.7). These drivers are that demo, made repeatable.
 
+The [C1-S1 operator inventory](../../../docs/developments/2026-q4-reliable-workflow/c1-s1/04_Validation_Inventory_and_Operator_Recipe.md)
+maps these tools to current app/profile rows, initial cost and missing access.
+The [v0.6.1 owner-confirmed publication](../../../docs/testing/firmware-v0.6.1-publication-2026-09-11.md)
+is a separate dated distribution outcome; its incomplete automated HIL remains
+unchanged. Release qualification requirements below still govern a fresh
+automated-qualified claim.
+
 Every valid outbound `CMD`, including no-response `FILE_PUT_DATA`, uses a
 request ID in 1–255. Transfer data and controls share a wrapping allocator;
 each Go-Back-N resend obtains another valid ID without waiting for a data
 
@@ -22,6 +22,10 @@ made that every old idea was copied into `corpus.json`.
 
 Host success is not physical qualification. v0.6.1 still requires fresh
 exact-byte HIL on all five profiles, including the iPadOS and Android rows,
-before release admission or publication.
+before standard automated-qualified release admission or publication. Its
+separate [owner-confirmed publication](../../../../docs/testing/firmware-v0.6.1-publication-2026-09-11.md)
+preserves incomplete automated records and supplies no substitute pass.
+The [C1-S1 operator inventory](../../../../docs/developments/2026-q4-reliable-workflow/c1-s1/04_Validation_Inventory_and_Operator_Recipe.md)
+maps host evidence to the physical work and access still required.
 
 <!-- SPDX-License-Identifier: MIT -->