fix(rocke): make f32 tanh AMDGPU-lowerable - #11697
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@copilot resolve the merge conflicts in this pull request |
…ke/aick-2054 # Conflicts: # dnn-providers/hip-kernel-provider/rocke/platform/python/rocke/core/lower_llvm.py # dnn-providers/hip-kernel-provider/rocke/platform/tests/instances/differential/golden/llvm_gfx_all.json Co-authored-by: tenpercent <4273004+tenpercent@users.noreply.github.com>
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Resolved the conflicts by merging the latest |
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Motivation
rocKE lowered
math.tanhtollvm.tanh.f32, which the AMDGPU production path cannot lower without a device libcall. The existing activation helper avoided that intrinsic but used a positive-exponent formulation that could overflow for large positive inputs.ISSUE ID : AICK-2054
Technical Details
math.tanhoperation to f32 and report matching diagnostics from the Python and C++ builders and verifiers for unsupported narrow operands.llvm.tanh.f32emission in both engines with a piecewise f32 implementation:abs(x) < 0.625;exp2and reciprocal formulation outside that range;llvm.tanh.f32declaration.Test Plan
[-20, 20]passed on both targets.Test Result
GPU validation used commit
204dee102d6da54663ba989765d8e8aef4825c42, modulesubuntu-24androcm/7.14.0, LLVM 23, and PyTorch2.13.0+rocm7.14.0.Both jobs completed with exit status 0. The existing numeric cases cover signed zero, infinities, NaN classification, tiny-value bit identity, and the piecewise boundary. The additional 2,000,001-point device sweep on
[-20, 20]compared results against NumPy float64tanhrounded to float32. Its observed maximum absolute error was below one f32 epsilon on both targets; this is a measured bound for that probe, not an exhaustive bound over all f32 inputs. The focused host tests also remain within one f32 epsilon over their deterministic probe.These runs compiled Python-generated LLVM through COMGR, loaded the resulting HSACO through HIP, and executed the rocKE kernels on the GPU. References were computed on CPU using NumPy/torch. A separately hashed validation adapter isolated COMGR in a fresh subprocess, supplied the verified ROCm release to the version guard because the wheel library tree lacks version metadata, retained LLVM/HSACO artifacts, and added the dense device sweep; PR source was unchanged. Python/C++ emission parity was validated separately as listed above.
The three GPU cases are registered in the differential numeric harness, which the examples runner invokes for gfx950. The main
platform/tests/run_all.pypytest path does not invoke that harness; adding a GPU pytest wrapper remains a separate follow-up. The additional dense device sweep is validation-adapter coverage, not part of the PR's routine suite.Submission Checklist