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RSX: Fix SAT and ABS order - #19326

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Yahfz:twistedmetal
Aug 31, 2026
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RSX: Fix SAT and ABS order#19326
kd-11 merged 2 commits into
RPCS3:masterfrom
Yahfz:twistedmetal

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@Yahfz

@Yahfz Yahfz commented Aug 26, 2026

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Real RSX applies the SAT modifier before ABS

Fixes #19258

hwtest:

tm-source-modifiers.zip

@AniLeo
AniLeo requested a review from kd-11 August 26, 2026 18:29
@Megamouse Megamouse added the RSX label Aug 26, 2026
@LoweysLitsman

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Fixes #19258
Twisted Metal overly bright fix

@Triticum0

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Doesn't effect #18452

@kd-11 kd-11 left a comment

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The hwtest provided is too narrow, it only proves the fix is correct for this one scenario. Instead of only having the visual confirmation mode, have the test output a data dump, multiple scenarios per input. This is an instruction ISA fix afterall so we have to check everything, not just abs and sat on one instruction.

Dump the output via TTY (see #19214 or #18171 for examples) and have it check all possibilities. From zeroes to infinity, -infinity, nan, etc and also covering multiple instructions (ideally most of them). That way when we commit it to automated testing, it will cover not only this game but every other game.

There are many questions here that need answering:

  • Is the order of modifiers we apply correct for the other instructions? Most of that work was reversed by using game shaders and was never verified on real hardware either.
  • Is it only divsq affected? What about other scalar instructions? Do they also have the same behavior?
  • What happens when divsq is called with +inf,-inf, qnan? Are modifiers ignored?

@Yahfz
Yahfz force-pushed the twistedmetal branch 2 times, most recently from fe70af0 to 6e089a3 Compare August 29, 2026 08:03
@Yahfz Yahfz changed the title RSX: Apply DIVSQ SAT before ABS RSX: Fix SAT and ABS order Aug 29, 2026
@Yahfz

Yahfz commented Aug 29, 2026

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Updated the hwtest covering the scalar instructions + all the other stuff. The tldr is basically:

Real RSX does SAT before ABS/NEG. Some inputs just happen to give the same result either way. The other scalar instructions i tested also all behave the same way.
HALF/FIXED12/FIXED9 gave the same result either way in the cases I tested, so im leaving them alone.
DIVSQ definitely doesn’t ignore the modifiers for +inf, -inf or NaN. SAT turns +inf into 1 and turns -inf/NaN into 0 before ABS and NEG happen.
Without SAT, with the other input set to +1, +inf and -inf stay infinite, dividing 1 by either infinity gives +0, and every type of NaN comes back as 0x7fffffff instead of keeping the original NaN bits

DIVSQ LEFT -inf: MASTER FAIL | OLD PR PASS | UPDATED PR PASS
DIVSQ RIGHT -inf: MASTER FAIL | OLD PR PASS | UPDATED PR PASS
RCP LEFT -inf: MASTER FAIL | OLD PR FAIL | UPDATED PR PASS
RSQ LEFT -inf: MASTER FAIL | OLD PR FAIL | UPDATED PR PASS
ADD LEFT -inf: MASTER FAIL | OLD PR FAIL | UPDATED PR PASS
DP3 LEFT -inf: MASTER FAIL | OLD PR FAIL | UPDATED PR PASS

@AniLeo
AniLeo requested a review from kd-11 August 30, 2026 11:14
@kd-11
kd-11 enabled auto-merge (rebase) August 31, 2026 09:54
@kd-11
kd-11 disabled auto-merge August 31, 2026 09:59
@kd-11
kd-11 enabled auto-merge (squash) August 31, 2026 10:00
@kd-11
kd-11 merged commit c6e9672 into RPCS3:master Aug 31, 2026
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@Yahfz
Yahfz deleted the twistedmetal branch September 4, 2026 07:12
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Twisted Metal - Overly bright visuals

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