From 436e379b7845cb12879c69c2f6404854208795ed Mon Sep 17 00:00:00 2001 From: Kennedy Caisley Date: Mon, 13 Jul 2026 20:17:25 +0200 Subject: [PATCH] feat(register): implement StdRegister readback --- basil/RL/StdRegister.py | 5 ++++- tests/test_StdRegister.py | 25 +++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 1 deletion(-) diff --git a/basil/RL/StdRegister.py b/basil/RL/StdRegister.py index f669f4f6..3e114467 100644 --- a/basil/RL/StdRegister.py +++ b/basil/RL/StdRegister.py @@ -127,7 +127,10 @@ def write(self, size=None): self._drv.start() def read(self): - raise NotImplementedError("read() not implemented") + """Read the backing hardware layer and update all named fields.""" + data = self._drv.get_data() + self.frombytes(data) + return data def _construct_reg(self): for field in self._fields: diff --git a/tests/test_StdRegister.py b/tests/test_StdRegister.py index e4ec1535..ae72c459 100644 --- a/tests/test_StdRegister.py +++ b/tests/test_StdRegister.py @@ -6,11 +6,13 @@ # import unittest +from unittest.mock import Mock import yaml from bitarray import bitarray from basil.dut import Dut +from basil.RL.StdRegister import StdRegister cnfg_yaml = """ transfer_layer: @@ -76,6 +78,29 @@ def test_mem_bytes(self): self.assertEqual(4, self.dut["spi_module"].MEM_BYTES) self.assertRaises(ValueError, self.dut["spi_module"].set_data, [1, 2, 3, 4, 5]) + def test_read(self): + driver = Mock() + data = [0xA5, 0x5A] + driver.get_data.return_value = data + register = StdRegister( + driver, + { + "name": "READBACK", + "size": 16, + "fields": [ + {"name": "UPPER", "size": 8, "offset": 15}, + {"name": "LOWER", "size": 8, "offset": 7}, + ], + }, + ) + + result = register.read() + + driver.get_data.assert_called_once_with() + self.assertIs(result, data) + self.assertEqual(register["UPPER"].tovalue(), 0xA5) + self.assertEqual(register["LOWER"].tovalue(), 0x5A) + def test_init_simple(self): self.dut["TEST1"].write() mem = dict()