synth: delete make memory, mem_dump.py and mem.json

flow/Makefile

@@ -246,13 +246,6 @@ synth-report: synth
 do-synth-report:
 	$(RUN_CMD) --log $(abspath $(LOG_DIR)/1_2_yosys_metrics.log) --tee -- $(OPENROAD_CMD) $(SCRIPTS_DIR)/synth_metrics.tcl
 
-.PHONY: memory
-memory:
-	if [ -f $(RESULTS_DIR)/mem_hierarchical.json ]; then \
-		$(PYTHON_EXE) $(SCRIPTS_DIR)/mem_dump.py $(RESULTS_DIR)/mem_hierarchical.json; \
-	fi
-	$(PYTHON_EXE) $(SCRIPTS_DIR)/mem_dump.py $(RESULTS_DIR)/mem.json
-
 # ==============================================================================
 
 

flow/scripts/memories/max_bits.tcl

@@ -0,0 +1,41 @@
+# Log every inferred memory with its dimensions. With mock set, shrink each
+# memory over max_bits to one row, kept as a module when keep_mocked is set;
+# otherwise stop with an error naming every memory over max_bits that has a
+# write port. Returns the mocked memories as a list of {module width size}.
+proc synth_memory_max_bits { max_bits mock keep_mocked } {
+  memory_collect
+  set mocked {}
+  set over {}
+  foreach path [split [string trim [tee -q -s result.string select -list t:\$mem_v2]] "\n"] {
+    set index [string first "/" $path]
+    set module [string range $path 0 [expr { $index - 1 }]]
+    set instance [string range $path [expr { $index + 1 }] end]
+
+    set width [rtlil::get_param -uint $module $instance WIDTH]
+    set size [rtlil::get_param -uint $module $instance SIZE]
+    set rom [expr { [rtlil::get_param -uint $module $instance WR_PORTS] == 0 }]
+    set nbits [expr { $width * $size }]
+    puts "Memory $path has dimensions $size x $width = $nbits[expr { $rom ? ", a ROM" : "" }]"
+    if { $nbits <= $max_bits } {
+      continue
+    }
+    if { $mock } {
+      rtlil::set_param -uint $module $instance SIZE 1
+      puts "Shrunk memory $path from $size rows to 1"
+      lappend mocked [list $module $width $size]
+      if { $keep_mocked } {
+        select -module $module
+        setattr -mod -set keep_hierarchy 1
+        select -clear
+      }
+    } elseif { !$rom } {
+      lappend over "$path $size x $width = $nbits"
+    }
+  }
+  if { [llength $over] > 0 } {
+    error "Memories over SYNTH_MEMORY_MAX_BITS=$max_bits, which would go into\
+      flip-flops: [join $over {, }]. Put them in macros (AUTO_MEMORIES,\
+      fakeram), mock them (SYNTH_MOCK_LARGE_MEMORIES=1) or raise the limit."
+  }
+  return $mocked
+}

flow/scripts/synth.tcl

@@ -152,37 +152,22 @@ if { [env_var_equals SYNTH_HDL_FRONTEND slang] } {
   opt_clean
 }
 
+# Fail early if this synthesis run is doomed
+set mocked [synth_memory_max_bits $::env(SYNTH_MEMORY_MAX_BITS) \
+  $::env(SYNTH_MOCK_LARGE_MEMORIES) $::env(SYNTH_KEEP_MOCKED_MEMORIES)]
 if { $::env(SYNTH_MOCK_LARGE_MEMORIES) } {
-  memory_collect
-  set select [tee -q -s result.string select -list t:\$mem_v2]
   set report_file [open $::env(REPORTS_DIR)/synth_mocked_memories.txt "w"]
-  foreach path [split [string trim $select] "\n"] {
-    set index [string first "/" $path]
-    set module [string range $path 0 [expr { $index - 1 }]]
-    set instance [string range $path [expr { $index + 1 }] end]
-
-    set width [rtlil::get_param -uint $module $instance WIDTH]
-    set size [rtlil::get_param -uint $module $instance SIZE]
-    set nbits [expr $width * $size]
-    puts "Memory $path has dimensions $size x $width = $nbits"
-    if { $nbits > $::env(SYNTH_MEMORY_MAX_BITS) } {
-      rtlil::set_param -uint $module $instance SIZE 1
-      puts "Shrunk memory $path from $size rows to 1"
-      puts -nonewline $report_file "$module:\n  width: $width\n  size: $size\n"
-      if { $::env(SYNTH_KEEP_MOCKED_MEMORIES) } {
-        select -module $module
-        setattr -mod -set keep_hierarchy 1
-        select -clear
-      }
-    }
+  foreach memory $mocked {
+    lassign $memory module width size
+    puts -nonewline $report_file "$module:\n  width: $width\n  size: $size\n"
   }
   close $report_file
 }
 
-json -o $::env(RESULTS_DIR)/mem.json
-# Run report and check here so as to fail early if this synthesis run is doomed
-exec -- $::env(PYTHON_EXE) $::env(SCRIPTS_DIR)/mem_dump.py \
-  --max-bits $::env(SYNTH_MEMORY_MAX_BITS) $::env(RESULTS_DIR)/mem.json
+# A yosys backend sorts the design by name before it writes, and the passes
+# below depend on that order; json -o mem.json did it here. The sort stays,
+# the file goes: dropping the sort changes results and is its own change.
+write_json /dev/null
 
 if { [env_var_exists_and_non_empty SYNTH_RETIME_MODULES] } {
   select {*}$::env(SYNTH_RETIME_MODULES)

flow/scripts/synth_preamble.tcl

@@ -49,6 +49,7 @@ proc read_checkpoint { file } {
 # canonicalization, one `<module> <area>` per line; see
 # docs/user/AutoMemories.md.
 source $::env(SCRIPTS_DIR)/memories/check_blackboxed.tcl
+source $::env(SCRIPTS_DIR)/memories/max_bits.tcl
 source $::env(SCRIPTS_DIR)/memories/drop_parameters.tcl
 
 proc auto_memories_areas { } {