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…ints (The-OpenROAD-Project#8075) findHoldViolations excluded every endpoint for which Sta::isClock() is true. isClock() reports any pin in a clock network's combinational fanout, which also includes register data (D) pins that sample a signal sourced from a clock -- e.g. a clock used as data that crosses into a different sampling-clock domain. Those D pins are legitimate hold endpoints, so repair_timing -hold silently reported "No hold violations found" while a real hold violation remained (issue The-OpenROAD-Project#8075). Refine the exclusion to skip only true clock-tree pins: pins that are on the clock network AND carry no timing check (!Vertex::hasChecks()). Register data pins that hold a setup/hold check are kept, so cross-clock -domain hold violations are detected and repaired. Clock-tree pins are still excluded as before. Add regression test repair_hold_clock_as_data where clk1 is used both as a clock (for r1) and as data into r2/D (r2 clocked by clk2). On the unfixed code RSZ reports "No hold violations found" and r2/D stays at -0.59; with the fix the endpoint is detected and repaired to >= 0. Registered in both CMake and Bazel. Signed-off-by: Saurav Singh <saurav.singh@fermions.co>
…paths With clock-as-data endpoints now visible to repair_timing -hold, the worst hold path to such an endpoint starts at the clock source rather than at a register clk->Q arc, so repairEndHold walks drivers that are part of the clock tree. A driver whose net also feeds clock sinks with negative (propagated) hold slack would get a hold buffer in front of those clock sinks, changing their clock latency. Compute the set of clock-network pins that transitively drive a clock sink (register/check clock pins, clock output ports) and skip those drivers when choosing a hold-buffer insertion point. Clock-network pins that only feed data pins are still eligible, so the clock-as-data hold violation is repaired on the data side. Add repair_hold_clock_as_data_clk_tree: clk1 drives r1/CK via i1 and r2/D via dbuf. Without this change the hold buffer is inserted on the clk1 net driving i1/A and r1/CK clock arrival moves from 0.018 to 0.373; with it the clk1 net and r1/CK arrival are unchanged and both hold endpoints are repaired. repair_hold_clock_as_data.ok is updated because its buffer now goes after dbuf instead of on the clk1 net. Signed-off-by: Saurav Singh <saurav.singh@fermions.co>
Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
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Code Review
This pull request addresses OpenROAD issue #8075, where hold violations on register data pins sampling a clock-sourced signal were missed. It introduces a mechanism to identify the clock tree proper by traversing backward from clock sinks, ensuring hold buffers are only inserted on the data side and not on clock-tree nets. Additionally, new integration tests are added to verify the fix. The review feedback suggests adding a null check for the pin pointer during the backward traversal of the clock network to prevent potential null pointer dereferences.
| const sta::Pin* from_pin = edge->from(graph_)->pin(); | ||
| if (clk_network->isClock(from_pin) | ||
| && clk_tree_pins_.insert(from_pin).second) { |
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During the backward traversal of the clock network, edge->from(graph_)->pin() can potentially return nullptr for certain vertices (such as virtual clocks or abstract timing nodes). Passing a null pointer to clk_network->isClock() can lead to undefined behavior or crashes depending on the underlying implementation. Adding a null check for from_pin ensures robust and safe traversal.
| const sta::Pin* from_pin = edge->from(graph_)->pin(); | |
| if (clk_network->isClock(from_pin) | |
| && clk_tree_pins_.insert(from_pin).second) { | |
| const sta::Pin* from_pin = edge->from(graph_)->pin(); | |
| if (from_pin | |
| && clk_network->isClock(from_pin) | |
| && clk_tree_pins_.insert(from_pin).second) { |
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Already approved in #10718 |
Takes over #10718 to resolve the merge conflict