🔗 GitHub Repository: Smart-Home-Automation-FPGA
An industry-oriented VLSI project implementing a Smart Home Controller on an FPGA. This design uses deterministic hardware logic (Verilog) to read environmental sensors and trigger automated actions, featuring custom Pulse Width Modulation (PWM) generators for appliance control and a priority-based safety override system.
- Hardware Description Language: Verilog (RTL)
- Simulation & Verification: Icarus Verilog / GTKWave / EDA Playground
- Synthesis (Target): Xilinx Vivado (Artix-7 / Basys 3)
- Inputs (Sensors/Switches): PIR (Motion), LDR (Light), Temperature, Door Contact, Manual Switches.
- Processing: Priority-based control logic ensuring zero-latency response for security alarms over general automation.
- Outputs: 8-bit configurable PWM for Lights and Fans, GPIO Siren.
rtl/: Main Verilog hardware source code (pwm_generator.v,smart_home_top.v).tb/: Testbench for simulation (smart_home_tb.v).constraints/: Physical pin mapping for the FPGA board (basys3.xdc).waveforms/: Saved VCD files from simulation.output/: Project screenshots, terminal logs, and proof of work.
The controller was rigorously tested using 4 primary conditions:
- Auto Mode (Motion + Dark): Light PWM ramps up automatically based on PIR and LDR sensors.
- Auto Mode (Hot + Empty): Fan PWM adjusts speed based on the temperature sensor.
- Manual Override: User input completely overrides automatic sensor settings.
- Security Breach: Highest priority interrupt triggers the alarm siren immediately, forcing all other operations to halt safely.
(Please check the output/ folder for simulation waveforms and code execution screenshots).