Errors When Converting Existing Designs to SKiDL

[GGbond-798]

Dear Author,
Hello! Thank you for your great work on SKiDL and the associated tools.
I encountered an issue while trying to convert my existing design to SKiDL. I exported the netlist from KiCad and successfully converted it to Python code using the terminal command:
netlist_to_skidl -i my_design.net -o my_design -w
This generated two files: main.pyand top.py. However, when I try to run the generated main.py, I get the following error:
ERROR: Can't open file: SR732ATTDR100F
Upon inspecting top.py, I noticed that the component description in the # Componentssection seems incorrect. It appears that the netlist_to_skidltool mistakenly interpreted the component model number (SR732ATTDR100F) as a library filename​ to be imported.
In my opinion, this string should be assigned to the component's valueattribute rather than being treated as a library name.
What do you think about this? Looking forward to your reply.
Best regards.

[GGbond-798]

Here is the detailed bug report.

ERROR: Can't open file: SR732ATTDR100F.
@ [D:\PycharmProjects\voltage\INA138_SKiDL\main.py:5=>D:\PycharmProjects\voltage\INA138_SKiDL\top.py:15]
WARNING: Could not load KiCad schematic library "SR732ATTDR100F", falling back to backup library. @ [D:\PycharmProjects\voltage\INA138_SKiDL\main.py:5=>D:\PycharmProjects\voltage\INA138_SKiDL\top.py:15]
Traceback (most recent call last):
File "D:\PycharmProjects\voltage\INA138_SKiDL\main.py", line 5, in
top()
File "D:\PycharmProjects\voltage.venv\Lib\site-packages\skidl\node.py", line 187, in call
results = node.func(args, **kwargs)
^^^^^^^^^^^^^^^^^^^^^^^^^^
File "D:\PycharmProjects\voltage\INA138_SKiDL\top.py", line 15, in top
R1 = Part('SR732ATTDR100F', 'SR732ATTDR100F', value='100 mΩ', footprint='kicad_api_lib:SR732ATTDR100F', ref='R1', fields={'MPN': 'SR732ATTDR100F', 'Manufacturer': 'KOA', 'MFG': 'KOA', 'body_length': '2 mm', 'body_width': '1.25 mm', 'case_code_imperial': '0805', 'composition': 'Thick Film', 'height': '500 µm', 'lead_free': 'Y', 'operating_temperature': '-55 °C, 150 °C', 'package': '0805', 'packaging': 'Tape and Reel', 'pins': '2', 'power_rating': '330 mW', 'resistance': '100 mΩ', 'temperature_coefficient': '100 ppm/°C', 'terminal_pitch': '1.7 mm', 'termination': 'SMD', 'tolerance': '1 %', 'voltage_rating': '1.58 V', 'Sheetname': '', 'Sheetfile': 'INA138NA3K_Current Sense Amplifier Circuit.kicad_sch', 'ki_keywords': 'r resistor', 'ki_fp_filters': 'R_'})
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "D:\PycharmProjects\voltage.venv\Lib\site-packages\skidl\part.py", line 257, in init
raise e
File "D:\PycharmProjects\voltage.venv\Lib\site-packages\skidl\part.py", line 249, in init
lib = SchLib(filename=libname, tool=tool)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "D:\PycharmProjects\voltage.venv\Lib\site-packages\skidl\schlib.py", line 111, in init
abs_filename = get_abs_filename(
^^^^^^^^^^^^^^^^^
File "D:\PycharmProjects\voltage.venv\Lib\site-packages\skidl\utilities.py", line 1250, in get_abs_filename
fp, fn = find_and_open_file(filename, paths, ext, allow_failure, False, descend)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "D:\PycharmProjects\voltage.venv\Lib\site-packages\skidl\utilities.py", line 1185, in find_and_open_file
active_logger.raise_(
File "D:\PycharmProjects\voltage.venv\Lib\site-packages\skidl\logger.py", line 289, in raise_
raise exc_class(msg)
FileNotFoundError: Can't open file: SR732ATTDR100F.

[GGbond-798]

After much trial and error, I discovered that the issue was due to an incorrect component symbol library path. After correcting the library path, the schematic generated successfully.

[GGbond-798]

However, why did the reference designators disappear in the generated schematic? For example, R? shows up instead.

[devbisme]

Can you look in the original generated schematic files to see if the reference designators are set correctly? Perhaps the schematic editor was going to do a re-annotation of the schematic or the references were misplaced/malformed.

[GGbond-798]

Thank you for the suggestion. I checked the original .netnetlist file, and the reference designators are set correctly there.
For example, the netlist contains the correct data:
(components
(comp
(ref "C1") ; <-- Correct refdes here
(value "1uF")
(footprint "...")
)
)Thank you for the suggestion. I checked the original .netnetlist file, and the reference designators are set correctly there.
For example, the netlist contains the correct data:
(components
(comp
(ref "C1") ; <-- Correct refdes here
(value "1uF")
(footprint "...")
)
)
However, when I open the generated schematic file (.schor .kicad_sch) in a text editor, I found the property mapping is abnormal.
The symbol definition shows:
(symbol "Device:C"
(property "Reference" "C") ; <-- Should be "C1"
(property "Value" "C") ; <-- Should be "1uF"
)
Although the netlist has the correct ref(e.g., "C1"), the generated schematic assigns the Library Name​ ("C") to both the Reference​ and the Value​ properties, discarding the actual reference designator and component value.
It seems the tool is overwriting the properties with the symbol name during generation. What do you think?

[devbisme]

The UUIDs for the schematic symbols are incorrect so EESCHEMA is overriding the assigned references and making the symbols unannotated. I will have to fix the UUID generation in the SKiDL schematic generation code.

[GGbond-798]

Hello Author,
I am currently attempting to convert an existing design to SKiDL. My workflow involves running a script in the project directory to regenerate the netlist and generate a schematic file that can be opened by KiCad Eeschema.
Currently, I am able to successfully regenerate the netlist, but I am unable to generate a valid schematic file for KiCad Eeschema.
Could you please advise on what might be causing this? Thanks a ton for taking the time to look into this and provide a solution! Below is the detailed error report:

INFO: 32 warnings found while generating netlist.
INFO: 0 errors found while generating netlist.

WARNING: Routing failed on attempt 1/2, expanding area by 1.5x: @ [C:\Users\dell\Desktop\kicadproject\原理图\skidl\电源转换模块\DC1\main.py:7]
WARNING: Routing failed on attempt 2/2, expanding area by 1.5x: @ [C:\Users\dell\Desktop\kicadproject\原理图\skidl\电源转换模块\DC1\main.py:7]
Traceback (most recent call last):
File "C:\Users\dell\Downloads\cannot (3).venv\Lib\site-packages\skidl\schematics\route.py", line 3177, in route
global_routes = node.global_router(internal_nets)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "C:\Users\dell\Downloads\cannot (3).venv\Lib\site-packages\skidl\schematics\route.py", line 2351, in global_router
next_route = rt_srch(start_face, stop_faces)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "C:\Users\dell\Downloads\cannot (3).venv\Lib\site-packages\skidl\schematics\route.py", line 2288, in rt_srch
raise GlobalRoutingFailure(
skidl.schematics.route.GlobalRoutingFailure: Global routing failure: Net-(U22-FB) Net-(U22-FB): Pin NT11/1/,,p1,p4819826600757986992/UNSPECIFIED, Pin R120/1/,p2391413724449208671,,p1/PASSIVE, Pin R121/1/,p2391413724449208671,,p1/PASSIVE, Pin U22/4/FB,FB,p7624813768985962896,p4/UNSPECIFIED [Pin NT11/1/,,p1,p4819826600757986992/UNSPECIFIED]

During handling of the above exception, another exception occurred:

Traceback (most recent call last):
File "C:\Users\dell\Desktop\kicadproject\原理图\skidl\电源转换模块\DC1\main.py", line 7, in
generate_schematic()
File "C:\Users\dell\Downloads\cannot (3).venv\Lib\site-packages\skidl\circuit.py", line 1319, in generate_schematic
tool_modules[tool].gen_schematic(self, **kwargs)
File "C:\Users\dell\Downloads\cannot (3).venv\Lib\site-packages\skidl\tools\kicad9\gen_schematic.py", line 708, in gen_schematic
raise failure_type
File "C:\Users\dell\Downloads\cannot (3).venv\Lib\site-packages\skidl\tools\kicad9\gen_schematic.py", line 597, in gen_schematic
node.route(**options)
File "C:\Users\dell\Downloads\cannot (3).venv\Lib\site-packages\skidl\schematics\route.py", line 3141, in route
child.route(tool=tool, **options)
File "C:\Users\dell\Downloads\cannot (3).venv\Lib\site-packages\skidl\schematics\route.py", line 3236, in route
raise RoutingFailure
skidl.schematics.route.RoutingFailure

[devbisme]

I fixed the problem with the reference designators as well as some other things. You can test the fix from the development branch:

pip install git+https://github.com/devbisme/skidl@development