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compile FP4 (attn_qat_infer) kernels for sm_121a (GB10), gated on CUDA >= 12.9
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Lines changed: 21 additions & 10 deletions

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fastvideo-kernel/CMakeLists.txt

Lines changed: 21 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ if(NOT GPU_BACKEND STREQUAL "ROCM")
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else()
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# Best-effort probe of the visible GPU (mirrors build.sh detect_with_torch).
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execute_process(
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COMMAND "${Python_EXECUTABLE}" -c "import torch; assert torch.cuda.is_available(); mj, mn = torch.cuda.get_device_capability(0); print(f'{mj}.{mn}a' if (mj, mn) in ((9, 0), (12, 0)) else f'{mj}.{mn}')"
75+
COMMAND "${Python_EXECUTABLE}" -c "import torch; assert torch.cuda.is_available(); mj, mn = torch.cuda.get_device_capability(0); print(f'{mj}.{mn}a' if (mj, mn) in ((9, 0), (12, 0), (12, 1)) else f'{mj}.{mn}')"
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OUTPUT_VARIABLE _FV_ARCH_LIST
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OUTPUT_STRIP_TRAILING_WHITESPACE
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RESULT_VARIABLE _fv_detect_rc
@@ -209,7 +209,7 @@ else()
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elseif(FASTVIDEO_KERNEL_BUILD_ATTN_QAT_INFER STREQUAL "AUTO")
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if(TORCH_CUDA_ARCH_LIST)
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string(REGEX MATCH
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"(^|[; ,])((12\\.0a)|(120a)|(sm_120a))([; ,]|$)"
212+
"(^|[; ,])((12\\.0a)|(120a)|(sm_120a)|(12\\.1a)|(121a)|(sm_121a))([; ,]|$)"
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_HAS_120A "${TORCH_CUDA_ARCH_LIST}")
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if(_HAS_120A)
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set(_WANTS_ATTN_QAT_INFER ON)
@@ -253,14 +253,16 @@ set(BUILD_CXX_KERNELS ON)
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# ---------------------------------------------------------------------------
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# Per-arch split for the Blackwell FP4 (attn_qat_infer) build
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# ---------------------------------------------------------------------------
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# The FP4 kernels are sm_120a-only (they emit `cvt.e2m1x2` etc.), while the main
257-
# extension (Hopper-only TK + generic turbodiffusion) targets the full arch list.
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# The FP4 kernels are Blackwell-only (sm_120a, plus sm_121a on CUDA >= 12.9; they
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# emit `cvt.e2m1x2` etc.), while the main extension (Hopper-only TK + generic
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# turbodiffusion) targets the full arch list.
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# find_package(Torch) injects ONE global -gencode list into CMAKE_CUDA_FLAGS that
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# forces every target onto every arch, so the FP4 sources also get the sm_90a pass
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# and ptxas rejects their Blackwell instructions. Strip that global list and drive
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# arch per target via CUDA_ARCHITECTURES instead (the fp4* targets pin 120a below;
262-
# the main extension gets the full list). Only do this for the FP4 build with an
263-
# explicit arch list, so the cu126 / local autodetect paths stay untouched.
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# arch per target via CUDA_ARCHITECTURES instead (the fp4* targets pin their arch
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# below via _fv_fp4_archs; the main extension gets the full list). Only do this for
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# the FP4 build with an explicit arch list, so the cu126 / local autodetect paths
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# stay untouched.
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if(ENABLE_ATTN_QAT_INFER AND TORCH_CUDA_ARCH_LIST)
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message(STATUS "[per-arch] CMAKE_CUDA_FLAGS before strip: ${CMAKE_CUDA_FLAGS}")
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string(REGEX REPLACE "-gencode[ =]+arch=[^ ]+" "" CMAKE_CUDA_FLAGS "${CMAKE_CUDA_FLAGS}")
@@ -270,7 +272,7 @@ if(ENABLE_ATTN_QAT_INFER AND TORCH_CUDA_ARCH_LIST)
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set(FASTVIDEO_MAIN_CUDA_ARCHS "${TORCH_CUDA_ARCH_LIST}")
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string(REPLACE "sm_" "" FASTVIDEO_MAIN_CUDA_ARCHS "${FASTVIDEO_MAIN_CUDA_ARCHS}")
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string(REPLACE "." "" FASTVIDEO_MAIN_CUDA_ARCHS "${FASTVIDEO_MAIN_CUDA_ARCHS}")
273-
message(STATUS "[per-arch] main extension archs=${FASTVIDEO_MAIN_CUDA_ARCHS}, fp4* archs=120a")
275+
message(STATUS "[per-arch] main extension archs=${FASTVIDEO_MAIN_CUDA_ARCHS}")
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endif()
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# Compiler flags
@@ -401,6 +403,15 @@ if(ENABLE_ATTN_QAT_INFER)
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"-DDQINRMEM"
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)
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# The FP4 kernels are arch-conditional (sm_120a). Add sm_121a (GB10 / DGX
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# Spark) only when the toolkit knows it -- compute_121 first exists in CUDA
408+
# 12.9, so unconditionally adding it would break sm_120a builds on CUDA 12.8.
409+
set(_fv_fp4_archs "120a")
410+
if(NOT CUDAToolkit_VERSION VERSION_LESS 12.9)
411+
list(APPEND _fv_fp4_archs "121a")
412+
endif()
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message(STATUS "[per-arch] fp4* archs=${_fv_fp4_archs} (CUDAToolkit ${CUDAToolkit_VERSION})")
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Python_add_library(fp4attn_cuda MODULE WITH_SOABI
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attn_qat_infer/blackwell/api.cu
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)
@@ -411,7 +422,7 @@ if(ENABLE_ATTN_QAT_INFER)
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$<$<COMPILE_LANGUAGE:CUDA>:${ATTN_QAT_INFER_CUDA_FLAGS}>
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)
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set_target_properties(fp4attn_cuda PROPERTIES
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CUDA_ARCHITECTURES "120a"
425+
CUDA_ARCHITECTURES "${_fv_fp4_archs}"
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CXX_STANDARD 17
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CUDA_STANDARD 17
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)
@@ -427,7 +438,7 @@ if(ENABLE_ATTN_QAT_INFER)
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$<$<COMPILE_LANGUAGE:CUDA>:${ATTN_QAT_INFER_CUDA_FLAGS}>
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)
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set_target_properties(fp4quant_cuda PROPERTIES
430-
CUDA_ARCHITECTURES "120a"
441+
CUDA_ARCHITECTURES "${_fv_fp4_archs}"
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CXX_STANDARD 17
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CUDA_STANDARD 17
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)

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