[perf]: Add guarded MiniMax-H3 Sol Engine inference optimizations - #1739
[perf]: Add guarded MiniMax-H3 Sol Engine inference optimizations#1739H1yori233 wants to merge 4 commits into
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Thanks for the optimization work. I found two correctness blockers and one evidence gap that should be resolved before merge.
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FASTVIDEO_MINIMAX_H3_ADALN_PRECOMPUTE=1is incompatible with the defaultdit_layerwise_offload=True. The offload hook replaces each block's parameters with zero-sized placeholders and materializes them only in that block'spre_forward;prepare_adaln_trajectory()callsblock.adaln_projdirectly outside the hook. The current guard rejects FSDP but not layerwise offload, so the advertised opt-in fails under the default inference configuration. Please either support materialization safely or reject the combination during pipeline initialization with an actionable message. I validated the early-rejection approach against default layerwise offload, FSDP, rank-reduced checkpoints, schedule reuse, and the default-off path (42 focused tests passed). -
The branch now conflicts with
mainafter #1741 infastvideo/attention/layer.py. The resolution needs to retain #1741's deferred, per-attention-instance compile boundary; restoring the earlier class-definition-time wrapper would regress regional compile. Please rebase and rerun the exact-head dense compile/SP tests. -
The packed-SP collective has local kernel tests but no real world-4 collective parity/failure gate, and the route is not guarded by
torch.is_grad_enabled(). Its custom collective has no registered backward, so enabling the environment flag can intercept a training forward even though the feature is described as inference-only. Please add a no-grad guard (or backward) and a real multi-rank parity test covering both directions and uneven local sequence padding.
Please also narrow or qualify “lossless”: the fusion test compares compiled fused output with the same eager fused operation, not with the unfused full pipeline. Existing fixed-seed Preview F4 evidence is deterministic but materially non-parity versus the eager/unfused route, so that serving profile remains report-only.
For integration provenance, this PR is useful but does not by itself reproduce the reported Preview SP-4 latency: sparse VSA cannot enable FASTVIDEO_MINIMAX_H3_PACKED_SP, and the 6.9-second route additionally needs temporal-parallel VAE decode (#1744). AdaLN precompute and packed SP were both disabled in that measurement.
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The requested H3-specific relayout placement is implemented and the corresponding thread is resolved on the rebased head.
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This PR has merge conflicts with the base branch. Please rebase: git fetch origin main
git rebase origin/main
# Resolve any conflicts, then:
git push --force-with-lease |
Summary
This rebases the unique MiniMax-H3 Sol Engine work onto current main and narrows it to two default-off inference optimizations:
The rebase preserves the already-merged per-instance compile policy, packed-varlen FlashAttention 4 path, compile-safe H3 fusion custom ops, and generic fused Ulysses implementation from main. Superseded fusion rewrites from the old branch were dropped.
Runtime contracts
Both flags and their lifecycle, memory, backend, and topology constraints are documented in the inference optimization guide.
CI ownership
mode=cuda-production.MASTER_PORT. No new CI lane or runner identity is introduced.Exact-head validation
Reviewed head:
7299c643e466e007b0c46e33efb958c1dd14d72b952 passed, 7 skipped.81 passed; the final latent-transfer cleanup case also passed after root review.mode=gloo-contract.git diff --check: passed.The local machine exposes one GPU, so strict CUDA world-4 cannot run locally. The requested full suite must provide that release gate before approval. Full H3 checkpoint media/SSIM parity was not run locally; the CI quality lane remains authoritative.
The earlier 4x GB200 timing on the historical branch was one post-warmup dense-FA4 DiT-stage sample collected before this rebase. It is retained only as scoped motivation, not as an exact-head performance claim.