[perf] Sequential MiniMax H3 start with GPU-direct DiT load - #1793
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SolitaryThinker merged 3 commits intoAug 31, 2026
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GB10 unified memory disables host offload, so MiniMax H3 CUDA used to load Qwen3-VL together with the DiT and VAEs and get killed by earlyoom. Encode first, drop the encoder, then load denoise weights. Input-prep geometry comes from the VAE arch configs until those modules exist. A later generate() on the same worker still needs a new process; prompt-cache reload is not in this change.
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aryan5v
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August 31, 2026 03:31
GB10 unified memory made the CPU-then-copy path take minutes for the 35B FastH3 transformer. When host offload is off, read safetensors onto the accelerator.
Always-on sequential load breaks a second generate() on discrete GPUs. Default auto: on unified memory, off otherwise.
KyleNeverGivesUp
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Aug 31, 2026
Resolves the one conflict, in spark_performance.md. hao-ai-lab#1793 appended an H3 sequential-load bullet to the same Running safely list that this branch appends its earlyoom diagnostics bullet to. Both bullets are kept, H3 first. This branch's bullet drops its opening sentence about earlyoom preferring Python because the H3 bullet now states that.
KyleNeverGivesUp
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Resolves the one conflict, in fsdp_load.py. hao-ai-lab#1771 added _summarize_param_names at the same position where this branch adds _has_fp8_convertible_layers. Both are new and unrelated, so both are kept. The to_cpu=cpu_offload change from hao-ai-lab#1793 comes in from main unchanged.
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Purpose
MiniMax H3 CUDA cannot keep Qwen3-VL resident with the DiT and VAEs on GB10 unified memory. Host offload is already disabled there.
This PR encodes first, releases the encoder, then loads DiT and VAEs when sequential load is on. DiT safetensors go onto the accelerator when
cpu_offloadis off (no CPU-then-copy).Changes
h3_sequential_load(--h3-sequential-load/--no-h3-sequential-load). Default auto: on unified-memory devices, off on discrete GPUs.vae,audio_vae, andtransformeruntil after conditioning when sequential load is on.to_cpu=cpu_offloadinstead of alwaysto_cpu=True.A second
generate()on a sequential-load worker still needs a new process. Training load order and LoRA wiring are unchanged.Test Plan
Spark GB10, FastH3 4-step Preview VSA-DataFree,
basic_fasth3.py --num-gpus 1 --vsa-kernel triton --no-fa4 --no-warmup --repeats 1, 768×1344×124, seed 2026, n=1.Test Results
CPU: 17 passed for sequential-load + FastH3 profile tests.
pre-commiton changed files: passed.Same Spark box, sequential alpine. Before = CPU-then-copy DiT load. After = GPU-direct DiT load.
VAE load stays ~75–80 s (different loader). Denoise/decode are n=1 and include first-run Triton. Both runs wrote a 4.4 MiB MP4. SSIM not run.
Checklist
pre-commit run --all-filesand fixed all issuesFor model/pipeline changes, also check: