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[driver] Serialize load_binary to prevent IGC race condition (#7581) - #7860

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[driver] Serialize load_binary to prevent IGC race condition (#7581)#7860
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IGC 2.38.x has a race condition in its in-process Level Zero JIT path (zeModuleCreate). When multiple Triton kernels JIT-compile concurrently in the same process (via AsyncCompileMode's ThreadPoolExecutor), each thread calls load_binary, which releases the Python GIL on entry to the C extension and then calls zeModuleCreate. With the GIL released, multiple threads can be inside zeModuleCreate simultaneously, corrupting IGC's internal state and triggering a SIGABRT in libigdrcl.so.

The crash is confirmed by the definitive test: adding any compilation overhead that serializes the calls (IGC_PrintToConsole=1, shader dump) prevents it entirely — proving a timing race, not a deterministic bug.

Fix: add a module-level threading.Lock that serializes all load_binary calls. This ensures only one thread is inside zeModuleCreate at a time, preventing the race without requiring an IGC fix.

Performance: verified +1.7% startup time difference (within measurement noise) on Arc A770 with vLLM. Hot-path inference is unaffected (kernels are cached after first compilation).

Fixes: #7581

IGC 2.38.x has a race condition in its in-process Level Zero JIT path
(`zeModuleCreate`). When multiple Triton kernels JIT-compile concurrently
in the same process (via AsyncCompileMode's ThreadPoolExecutor), each
thread calls `load_binary`, which releases the Python GIL on entry to the
C extension and then calls `zeModuleCreate`. With the GIL released,
multiple threads can be inside `zeModuleCreate` simultaneously, corrupting
IGC's internal state and triggering a `SIGABRT` in `libigdrcl.so`.

The crash is confirmed by the definitive test: adding any compilation
overhead that serializes the calls (`IGC_PrintToConsole=1`, shader dump)
prevents it entirely — proving a timing race, not a deterministic bug.

Fix: add a module-level `threading.Lock` that serializes all `load_binary`
calls. This ensures only one thread is inside `zeModuleCreate` at a time,
preventing the race without requiring an IGC fix.

Performance: verified +1.7% startup time difference (within measurement
noise) on Arc A770 with vLLM. Hot-path inference is unaffected (kernels
are cached after first compilation).

Fixes: #7581
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[vLLM][TritonIntelGPU] Triton kernel JIT compilation during inference: _compute_slot_mapping_kernel. Arc A770

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