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Merge pull request #105 from litex-hub/fix/ddr-phy-timing-validation ci #217: Commit c26bc0f pushed by enjoy-digital
1m 30s master
master
1m 30s
phy/xilinx: Add STARTUPE3 primary-flash PHY ci #216: Pull request #108 opened by enjoy-digital
1m 32s feature/startupe3-phy
feature/startupe3-phy
1m 32s
test: Exercise STARTUPE3 primary-flash PHY ci #215: Commit 34c3352 pushed by enjoy-digital
1m 20s feature/startupe3-phy
feature/startupe3-phy
1m 20s
phy/generic_sdr: Wait for STARTUPE2 handoff ci #214: Pull request #107 opened by enjoy-digital
1m 24s fix/startupe2-startup-ready
fix/startupe2-startup-ready
1m 24s
test: Cover STARTUPE2 first-transfer timing ci #213: Commit 307544b pushed by enjoy-digital
1m 24s fix/startupe2-startup-ready
fix/startupe2-startup-ready
1m 24s
phy/generic_ddr: Add configurable SCK divider ci #212: Pull request #106 opened by enjoy-digital
1m 27s feature/ddr-phy-clock-divider
feature/ddr-phy-clock-divider
1m 27s
test: Exercise divided DDR PHY timing ci #211: Commit 31088b3 pushed by enjoy-digital
1m 43s feature/ddr-phy-clock-divider
feature/ddr-phy-clock-divider
1m 43s
phy/generic_ddr: Validate timing and fix portable tristate use ci #210: Pull request #105 opened by enjoy-digital
1m 32s fix/ddr-phy-timing-validation
fix/ddr-phy-timing-validation
1m 32s
test: Cover DDR command/read turnaround ci #209: Commit 4b671db pushed by enjoy-digital
1m 16s fix/ddr-phy-timing-validation
fix/ddr-phy-timing-validation
1m 16s
Merge pull request #104 from litex-hub/modules-sr1-bit6-quad-enable ci #208: Commit fb279cd pushed by enjoy-digital
1m 29s master
master
1m 29s
modules: describe ISSI and Macronix quad enable ci #207: Pull request #104 opened by enjoy-digital
1m 24s modules-sr1-bit6-quad-enable
modules-sr1-bit6-quad-enable
1m 24s
modules: describe ISSI and Macronix quad enable ci #206: Commit 1fb40e6 pushed by enjoy-digital
1m 21s modules-sr1-bit6-quad-enable
modules-sr1-bit6-quad-enable
1m 21s
Merge pull request #103 from litex-hub/fix-is25lp128-quad-enable ci #205: Commit 3a26927 pushed by enjoy-digital
1m 48s master
master
1m 48s
modules: describe IS25LP128 quad-enable sequence ci #204: Pull request #103 opened by enjoy-digital
1m 31s fix-is25lp128-quad-enable
fix-is25lp128-quad-enable
1m 31s
modules: describe IS25LP128 quad-enable sequence ci #203: Commit 4f82bde pushed by enjoy-digital
1m 31s fix-is25lp128-quad-enable
fix-is25lp128-quad-enable
1m 31s
ci: Use shallow LiteX setup clones ci #202: Commit 02d5a20 pushed by enjoy-digital
1m 45s master
master
1m 45s
Merge pull request #102 from paulhamsh/STARTUPE2-fix ci #201: Commit e01069b pushed by enjoy-digital
2m 25s master
master
2m 25s
clkgen: Drive ECP5 USRMCLKTS from reset ci #199: Commit 8c75b24 pushed by enjoy-digital
2m 15s master
master
2m 15s
csr: use explicit CSR signal aliases ci #198: Commit 1ea0304 pushed by enjoy-digital
2m 24s master
master
2m 24s
integration: use canonical SoCCore imports ci #197: Commit ac8c9cb pushed by enjoy-digital
2m 22s master
master
2m 22s
Merge pull request #99 from trabucayre/p25q32h ci #196: Commit 5e89a48 pushed by enjoy-digital
2m 14s master
master
2m 14s
P25q32h ci #195: Pull request #99 synchronize by trabucayre
2m 2s trabucayre:p25q32h
trabucayre:p25q32h
2m 2s
P25q32h ci #194: Pull request #99 opened by trabucayre
1m 58s trabucayre:p25q32h
trabucayre:p25q32h
1m 58s
modules: describe S25FL-S quad-enable sequence ci #193: Commit d766c95 pushed by enjoy-digital
1m 59s master
master
1m 59s
ci: make PyPI publishing manual ci #192: Commit 1efccce pushed by enjoy-digital
2m 15s 2026.04
2026.04
2m 15s