Minor XMLoadFloat3A/4x3(A) SSE4 optimization - #307
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Chuck Walbourn (walbourn)
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Jesse Natalie (jenatali)
May 14, 2026 04:58
Jesse Natalie (jenatali)
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Makes sense, the zero register doesn't need to come from memory and you probably even already have a zero'd register somewhere so using the imm 3 bits instead of constructing a full 3-lane mask from memory is probably a nice win.
Chuck Walbourn (walbourn)
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I looked in a few other places where I use the same mask. Most of those case already have SSE4 replacements that use different instructions. |
Jesse Natalie (jenatali)
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