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wicr_setup() compares each WICR word against its intended value and skips the write when they already match, to limit MRAM wear. The comparison was done before the CONFIGNVR page was unlocked, but the page permissions gate reads as well as writes, so every read returned 0xFFFFFFFF and no word ever matched. All ten words were rewritten to MRAM on every boot. Unlock the page before the loop so the comparison sees the stored contents. Also wait for MRAMC to report ready before reading a written value back and before locking the page again, matching the sequencing already used by the other CONFIGNVR writer in NCS. Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no> Assisted-by: Claude:claude-opus-5
__NRF_TFM__ is an sdk-nrf definition, so soc.c was changed to select the secure or non-secure address of a peripheral from NRF_APPLICATION and __ZEPHYR__ instead. soc.h still used __NRF_TFM__ to pick the address of the antenna switch control register, which left the two files disagreeing on how a secure build is identified. Use !defined(__ZEPHYR__) for the same purpose. The selection is unchanged for all three cases: a TF-M build does not define __ZEPHYR__, a secure Zephyr build does not define CONFIG_TRUSTED_EXECUTION_NONSECURE, and a non-secure Zephyr build defines the latter but not the former. Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no> Assisted-by: Claude:claude-opus-5
HFXO64M is disabled after cold boot and a hardware request via the CORE signal has no effect until software has brought it up. The Wi-Fi core requests the 64 MHz clock as soon as it starts, so this has to happen before the LMAC processor is kickstarted. Add an hfxo64m_setup() helper that follows the startup sequence from the datasheet: apply the crystal trim codes, configure the oscillator, set the settle, damping and chirp timings, release the mirror lock so the mirrored registers are taken into use, and hand power control over to the HFXO64M controller. Invoke it from soc_early_init_hook() ahead of antsw_setup() and wifi_setup(). The MDK only describes the event and interrupt registers of this peripheral, so the configuration register offsets and bit fields are taken from the datasheet and the registers are accessed directly through the non-secure mapping. FICR does not carry HFXO64M trim values yet, so the default trim codes for the crystal are used until it does. Signed-off-by: Praveen Kankipati <Praveen.Kankipati@nordicsemi.no> Assisted-by: Claude:claude-opus-5
Signed-off-by: Erdem Simsek <erdem.simsek@nordicsemi.no>
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
The antenna switch power (pwr_antswc, via the PWR_ANTSWC register) was enabled after wifi_setup() had already kickstarted the Wi-Fi core. Move it ahead of the Wi-Fi boot so the switch is powered before the core starts using it. Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no> Assisted-by: Claude:claude-opus-4.8
This cuts the flashing time in half and is also reliable. Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
nRF7120 and nRF7120E HW rev 1.0 devices require an erase to be performed before programming. Signed-off-by: Robert Robinson <robert.robinson@nordicsemi.no>
Before starting communication with the Wi-Fi core, the antenna switch (ANTSW) needs to be steered towards WLAN. This has to happen before the LMAC processor is kickstarted in soc_early_init_hook(), which runs before the GPIO driver is available (and, for TF-M, in the secure image), so GPIO hogs or the GPIO driver cannot be used here. Describe the steering line in devicetree through a new nordic,nrf71-wifi-antsw node instead of hardcoding the pin, and drive it in soc_early_init_hook() using NRF_DT_GPIOS_TO_PSEL with the nrf_gpio HAL. Going through the HAL keeps the access on the P0 alias that matches the build's security state, so it works in both secure and non-secure builds. The steering is sequenced after the antenna switch is powered (pwr_antswc) and before the Wi-Fi core is kickstarted. A build assertion enforces that steering is only configured when pwr_antswc is present, so the switch is never steered without being powered. Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no> Assisted-by: Claude:claude-opus-4.8
Expand image slots and storage partitions to utilize the full MRAM address space on nRF7120. Signed-off-by: Dhanoo Surasarang <dhanoo.surasarang@nordicsemi.no>
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Automatically created by action-manifest-pr GH action from PR: nrfconnect/sdk-zephyr#4476 Signed-off-by: Nordic Builder <pylon@nordicsemi.no>
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
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Automatically created by action-manifest-pr GH action from PR: nrfconnect/sdk-zephyr#4476 Signed-off-by: Nordic Builder <pylon@nordicsemi.no>
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