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1 | 1 | # Release Notes |
2 | 2 |
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| 3 | +## 2.6-GA, June 2026 |
| 4 | + |
| 5 | +### Dependencies |
| 6 | + |
| 7 | +- IGX Orin: |
| 8 | + [IGX-SW 1.1.3 Production Release](https://developer.nvidia.com/igx-downloads) |
| 9 | +- IGX Thor: [IGX-SW 2.0 Production Release](https://developer.nvidia.com/igx-downloads) |
| 10 | +- AGX Orin: Use [SDK Manager](https://developer.nvidia.com/sdk-manager) to set up |
| 11 | + JetPack 7.2. |
| 12 | +- AGX Thor: Use [SDK Manager](https://developer.nvidia.com/sdk-manager) to set up |
| 13 | + JetPack 7.2. |
| 14 | +- Holoscan Sensor Bridge, 10G; FPGA v2603. |
| 15 | + |
| 16 | +Be sure and follow the installation instructions included with the release, including |
| 17 | +PTP configuration and HSB device firmware updates. To generate documentation, in the |
| 18 | +host system, run `sh docs/make_docs.sh`, then use your browser to look at |
| 19 | +`docs/user_guide/_build/html/index.html`. |
| 20 | + |
| 21 | +### Updates from 2.6-EA2 |
| 22 | + |
| 23 | +- **Jetpack 7.2** Support for AGX Orin and AGX Thor including updates to SIPL (Thor) and |
| 24 | + Argus (Orin) frameworks |
| 25 | +- **HSDK** Update support to |
| 26 | + [HSDK 4.2.0](https://docs.nvidia.com/holoscan/archive/4.2.0/index.html) |
| 27 | +- **LeopardImaging Eagle Camera** Support for 8-bit, 60 fps mode on AGX Thor |
| 28 | +- **Lattice IMX274** Support for 12-bit, 30 fps mode |
| 29 | +- **Firmware Setup** `hsb_flasher` as primary |
| 30 | + [firmware setup](https://docs.nvidia.com/holoscan/sensor-bridge/latest/sensor_bridge_firmware_setup.html) |
| 31 | + tool. |
| 32 | +- **CoE Offload Features** SIPLCaptureService for HSBs running sensors at heterogeneous |
| 33 | + frame rates. More generic sensor frame/non-image layout support in FusaCoeCapture |
| 34 | + operator |
| 35 | +- **SubFrameVisualizerOp** to improve support for sub-frame processing |
| 36 | +- **x86 Linux** added |
| 37 | + [RoCE setup support](https://docs.nvidia.com/holoscan/sensor-bridge/latest/setup.html#sd-tab-item-4) |
| 38 | +- **Agentic AI** Added |
| 39 | + [skills](https://github.com/nvidia-holoscan/holoscan-sensor-bridge/tree/main/skills) |
| 40 | + directory for workflows or setup involving HSB |
| 41 | + |
| 42 | +on top of features from the 2.6-EA and 2.6-EA2 releases and many minor updates. |
| 43 | + |
| 44 | +## 2.6-EA2, April 2026 |
| 45 | + |
| 46 | +### Dependencies |
| 47 | + |
| 48 | +- IGX: [IGX-SW 1.1.2 Production Release](https://developer.nvidia.com/igx-downloads) |
| 49 | +- AGX: Use [SDK Manager](https://developer.nvidia.com/sdk-manager) to set up JetPack |
| 50 | + 6.2.1. |
| 51 | +- Thor: Use [SDK Manager](https://developer.nvidia.com/sdk-manager) to set up JetPack |
| 52 | + 7.1. |
| 53 | +- Holoscan Sensor Bridge, 10G; FPGA v2603. |
| 54 | + |
| 55 | +Be sure and follow the installation instructions included with the release, including |
| 56 | +PTP configuration and HSB device firmware updates. To generate documentation, in the |
| 57 | +host system, run `sh docs/make_docs.sh`, then use your browser to look at |
| 58 | +`docs/user_guide/_build/html/index.html`. |
| 59 | + |
| 60 | +### Updates 2.6-EA |
| 61 | + |
| 62 | +- Numerous stability improvements |
| 63 | +- `hsb_flasher` is included but is still under development; continue to use the |
| 64 | + traditional FPGA programming tools |
| 65 | +- Emulator updates |
| 66 | +- FPGA IP block stability updates |
| 67 | + |
| 68 | +NOTE an important stability improvement affects application code: An update to HSDK |
| 69 | +results in operators holding on to buffers longer, which can result in BlockMemoryPool |
| 70 | +instances running out of buffer space. For this reason, you'll see many of the examples |
| 71 | +and tests have been updated with increased values for `num_blocks`-- you may have to |
| 72 | +apply this same fix to your application code. |
| 73 | + |
| 74 | +### Updates from 2.5-GA |
| 75 | + |
| 76 | +- **HSDK 4.0** HSB is updated to support running under HSDK 4.0. |
| 77 | +- **Thor and JetPack 7.1** Support for receive-only RDMA on AGX Thor units (with mgbe |
| 78 | + NICs) is provided. |
| 79 | +- **ComputeCrcOp** and **CheckCrcOp** use [nvCOMP](https://developer.nvidia.com/nvcomp) |
| 80 | + to compute the CRC-32 of the received data frame. This CRC can be compared against the |
| 81 | + CRC sent by the FPGA (available in pipeline metadata) to ensure the local data frame |
| 82 | + has the same content as was received by the FPGA. See |
| 83 | + `examples/imx274_frame_validation.py` for an example. |
| 84 | +- **ComputePvaCrcOp** and **CheckPvaCrcOp** use |
| 85 | + [PVA](https://developer.nvidia.com/embedded/pva) to calculate the CRC in the same |
| 86 | + manner as ComputeCrcOp, with an implementation that uses PVA instead of GPU. This is |
| 87 | + only supported for systems that include PVA. See |
| 88 | + `examples/imx274_pva_crc_validation.py` for details. |
| 89 | +- **Sub frame processing** Examples include support for video applications that can |
| 90 | + begin ISP on parts of the received image, allowing pipelining of video processing with |
| 91 | + receipt of data. |
| 92 | +- **UART support** Some HSB units include a UART block; APIs are added for control. See |
| 93 | + `examples/uart_dual_board_loopback.py` for details. |
| 94 | +- **HSB Emulator** Code allowing STM32F767ZI to emulate the HSB IP block is provided, |
| 95 | + and is intended to be portable across other environments. |
| 96 | + |
| 97 | +And many more minor updates. |
| 98 | + |
3 | 99 | ## 2.5-GA, December 2025 |
4 | 100 |
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5 | 101 | ### Dependencies |
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