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Add PHY status polling and board-specific MII configuration for reliable RJ45 link bring-up on the VelaGuard extension board. Contest: contest2026_004 Team Falcons / VelaGuard Co-authored-by: Cursor <cursoragent@cursor.com>
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Disable FIFO on RS485 ports, make txempty require TXE|TC then drop DIR in thread context, and avoid flipping DIR from the TC ISR mid-frame.
Add velaguard-net/emmc/ai-probe defconfigs, SDMMC bring-up, /data layout mkdir on eMMC, and stage0→stage1 config path migration for VelaGuard stage1. Co-authored-by: Cursor <cursoragent@cursor.com>
Return max touch points for LVGL and tslib consumers that query the capability via TSIOC_GETMAXPOINTS ioctl. Co-authored-by: Cursor <cursoragent@cursor.com>
7 tasks
Switch the touch INT to pull-up/falling-edge trigger mode, fix THRESHY drop-outs, and keep framebuffer pan from blocking indev. Land velaguard-lvgl and velaguard-min defconfigs on the board tree instead of contest patches. Co-authored-by: Cursor <cursoragent@cursor.com>
Raising DIR only in up_send() raced the USART shifter; dropping it on TC let A/B float and prepended 0xFF onto the next PDU. Also point /dev/rs485 at ttyS1 when USART2 is not enabled. Co-authored-by: Cursor <cursoragent@cursor.com>
Raise LINELEN/MAXARGUMENTS so long vgpoint apply commands fit on the serial shell. Co-authored-by: Cursor <cursoragent@cursor.com>
Point the HMI report browser at /data/velaguard/reports. Co-authored-by: Cursor <cursoragent@cursor.com>
checkpatch failed on open-vela#352 with: - board.h:274 and stm32_bringup.c:141/155/383: long lines - stm32_bringup.c:378: missing blank line after comment - stm32_pwm.c: no license header and no section banners, so the file was skipped by nxstyle entirely Wrap the long comments and syslog strings, add the blank line, and bring stm32_pwm.c to the standard NuttX file layout (same content as on velaguard/board-and-defconfigs). No functional change.
Intermittent hard faults on stm32h750b-dk (hpwork 2026-09-12, ai_agent 2026-09-02) reach PANIC_WITH_REGS with no fault detail because the CFSR/HFSR/BFAR dump is gated behind CONFIG_DEBUG_HARDFAULT_ALERT. Print the SCB fault status and the stacked PC/LR unconditionally so the failing access can be identified from the console dump alone.
… corruption guard - BOARD_SDRAM2_HEAP_OFFSET 1MB -> 2MB: with LTDC double buffering the second framebuffer lands at SDRAM+1MB, exactly where the heap region used to start; normal HMI rendering smashed the region's free-node metadata and the first mallinfo() walk hardfaulted (deterministic, every boot, VelaGuard HMI). - mm_foreach: with CONFIG_MM_RECORD_STACK, validate the walk (size field escaping the region, free-list neighbors outside all heap regions) and dump the offending node + region layout instead of faulting inside DEBUGASSERT. Verified on hardware: catches the corruption and keeps the system alive for diagnosis.
Goldfish CI builds with a single heap region, so mm_nregions is not a struct member. Guard that access and fix remaining nxstyle nits. Co-authored-by: Cursor <cursoragent@cursor.com>
A board watch on 2026-09-14 caught hpwork in stm32_recvfifo taking an imprecise bus fault while writing 0x38010004, just past SRAM4. The PIO path trusts priv->buffer without checking it, so a buffer outside the memory the controller can reach walks off the region. stm32_sdmmc_userbuf_ok() accepts the four regions the controller can reach (DTCM, AXI SRAM, SRAM123, SRAM4) plus the XIP window, and rejects anything else. stm32_sendfifo() and stm32_recvfifo() check each chunk before touching the FIFO: a rejected transfer is drained, the remaining count is zeroed and the drop is logged with the offending pointer instead of being allowed to fault. Keep the region list in step with the memory map. A buffer the system really hands out but that is missing from the list is dropped mid-transfer, and a dropped block write leaves the card answering ETIMEDOUT to everything after it. Co-Authored-By: Claude Code <noreply@anthropic.com>
工具调用与较长 HTTPS 回复需要更大默认栈,与参赛仓 scripts/configs 对齐。 Co-authored-by: Cursor <cursoragent@cursor.com>
与参赛仓 scripts/configs/velaguard-lvgl.defconfig 保持一致,避免仅装脚本配置时漏拷。 Co-authored-by: Cursor <cursoragent@cursor.com>
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Summary
Contest Team Falcons / VelaGuard board support on STM32H750B-DK (stacked commits on
velaguard/eth-mii-stm32h750b-dk):tcdrainpath; disable FIFO; drop DIR in thread context (half-duplex frame integrity)velaguard-net/velaguard-emmc/velaguard-ai-probedefconfigs; SDMMC bring-up; eMMC/datalayout mkdir; stage0→stage1 config path migrationTSIOC_GETMAXPOINTSinft5x06for upcoming LVGL HMITest plan
velaguard-net)vgmodbusread + frame stats AC/data/velaguard/config+/data/agentpersist across resetContest
learn_vela)