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@riscv-software-src RISC-V Software

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    Repositories list

    24 repositories

    • sail-riscv-tests

      Public
      Precompiled test suites for comprehensive testing of the Sail RISC-V model
      Just
      •
      Apache License 2.0
      •3•2•1•4•Updated Sep 4, 2026Sep 4, 2026

    • opensbi

      Public
      RISC-V Open Source Supervisor Binary Interface
      C
      •
      Other
      •710•1.5k•93•4•Updated Sep 4, 2026Sep 4, 2026

    • riscv-isa-sim

      Public
      Spike, a RISC-V ISA Simulator
      C
      •
      Other
      •1.1k•3.2k•340•66•Updated Sep 2, 2026Sep 2, 2026

    • librpmi

      Public
      Reference implementation of RPMI specification as a library.
      C
      •
      Other
      •24•17•3•4•Updated Sep 1, 2026Sep 1, 2026

    • riscv-tests

      Public
      Assembly
      •
      Other
      •562•1.2k•124•21•Updated Aug 14, 2026Aug 14, 2026

    • homebrew-riscv

      Public
      homebrew (macOS) packages for RISC-V toolchain
      macoshomebrewriscv
      macoshomebrewriscv
      Ruby
      •55•371•2•0•Updated Jul 9, 2026Jul 9, 2026

    • riscv-udb-for-ame

      Public
      RISC-V UDB Fork for AME Development
      Ruby
      •
      Other
      •247•0•0•0•Updated Jun 29, 2026Jun 29, 2026

    • riscv-perf-model

      Public
      Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model
      modelingperformance-analysisout-of-order
      modelingperformance-analysisout-of-orderrisc-v
      C++
      •
      Apache License 2.0
      •91•221•26•6•Updated May 29, 2026May 29, 2026

    • riscv-mirror-mavis

      Public
      Mirror of Mavis. Mavis is a framework that allows decoding of the RISC-V ISA into custom instruction class types as well as custom extensions to those class typ…
      C++
      •
      Apache License 2.0
      •1•0•0•0•Updated May 29, 2026May 29, 2026

    • riscv-mirror-fsl

      Public
      Mirror of FSL. Fusion/Fracture Specification Language.
      C++
      •
      Apache License 2.0
      •1•0•0•0•Updated May 16, 2026May 16, 2026

    • riscv-config

      Public archive
      RISC-V Configuration Validator
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •54•82•21•20•Updated Apr 16, 2026Apr 16, 2026

    • riscof

      Public archive
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •54•105•58•15•Updated Apr 16, 2026Apr 16, 2026

    • riscv-mirror-stf-library

      Public
      Mirror of STF Library. The acronym STF stands for Simulation Trace Format. This is intended to be used with Sparta-based simulators, but that's not necessary.
      C++
      •
      Apache License 2.0
      •1•0•0•0•Updated Apr 14, 2026Apr 14, 2026

    • riscv-etrace-lib

      Public
      The etrace library provides developers with tools to efficiently decode and analyze e-trace packets, enabling deeper insights into system behavior and performan…
      C
      •
      Other
      •0•0•0•0•Updated Mar 30, 2026Mar 30, 2026

    • riscv-brs-tests

      Public
      RISC-V Boot and Runtime Services Test Suite
      C
      •
      Apache License 2.0
      •8•4•0•1•Updated Feb 25, 2026Feb 25, 2026

    • riscv-hpc-benchmarks

      Public
      The HPC SIG is compiling a curated set of HPC-relevant benchmarks and configurations that vendors and tool developers can use to evaluate performance.
      0•0•0•0•Updated Oct 16, 2025Oct 16, 2025

    • riscv-pk

      Public
      RISC-V Proxy Kernel
      C
      •
      Other
      •342•708•87•5•Updated Oct 2, 2025Oct 2, 2025

    • riscv-udb-generators

      Public
      Repository for the Fall 2025 RISC-V International Mentorship. Focused on supporting the Unified Database (UDB) project by building and refining generators, whil…
      0•0•0•0•Updated Sep 18, 2025Sep 18, 2025

    • riscv-ctg

      Public archive
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •52•43•12•8•Updated Nov 4, 2024Nov 4, 2024

    • se-sig-analysis

      Public
      Toolchains, scripts, and workloads to analyze proposed instructions as part of the Scalar Efficiency SIG.
      Ruby
      •
      Other
      •0•0•0•0•Updated May 30, 2024May 30, 2024

    • riscv-tools

      Public archive
      RISC-V Tools (ISA Simulator and Tests)
      Shell
      •446•1.2k•104•3•Updated Dec 22, 2022Dec 22, 2022

    • .github

      Public
      0•0•0•0•Updated Jul 1, 2022Jul 1, 2022

    • riscv-overlay

      Public
      The Software Overlay TG will specify the requirements for the software overlay feature, both from the FW manager engine and from toolchain aspects, all which w…
      C
      •
      Creative Commons Attribution 4.0 International
      •5•14•1•1•Updated May 24, 2022May 24, 2022

    • riscv-angel

      Public
      JavaScript RISC-V ISA Simulator. Boots linux in a web-browser.
      JavaScript
      •
      Other
      •64•360•7•1•Updated Aug 25, 2020Aug 25, 2020
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