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Fix dim_order derivation for channels-last tensors with size-1 dims (#22745)
Fixes#22520. Stride sorting can give a channels-last tensor with a
size-1 channel an unsupported dimension order, such as `(0, 2, 1, 3)`
for the KWS input `(1, 1, 49, 10)`. Pass sizes through tensor specs,
weight emission, and serialization so these orders can be corrected when
strides exactly match channels-last. Preserve existing default orders,
which keeps physically equivalent singleton layouts compatible with
portable kernels. Reuse PyTorch's stride calculation; memory-format pass
behavior is unchanged.
Add coverage for the convolution export, mixed-format addition, 5D ReLU,
and symbolic sizes. Re-enable the NXP channels-last PTQ/QAT cases with
the portable C++ reference and the comparator's standard finite MSE
tolerance (`3.5e-4`).
Validation: 287 tests passed across tensor, dim-order, passes, native
serialization, EXIR serialization, and layout transforms; 49 skipped and
1 expected failure. The unrelated `test_to_out_variant_none_output`
failure was confirmed with pre-PR stride inference. Lintrunner is clean
on all touched files. Portable runtime probes match Python for addition,
5D ReLU, and PTQ/QAT convolution and DSCNN KWS models (XNNPACK PT2E
quantization, no delegation). The full NXP simulator suite requires CI
and was not run locally.
This PR was authored with AI assistance (Muse Code and Codex).
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