CHERI encodings and CSRs to match 0.9.7

Author: tariqkurd-repo

arg_lut.csv

@@ -92,6 +92,7 @@
 "rd_n2", 11, 7
 "rd_n0", 11, 7
 "rs1_n0", 11, 7
+"rs2_n0", 24, 20
 "c_rs2_n0", 6, 2
 "c_rs1_n0", 11, 7
 "c_rs2", 6, 2

csrs.csv

@@ -92,6 +92,10 @@
 0x257, "vsireg6"
 0x25C, "vstopei"
 0x280, "vsatp"
+0x480, "utidc"
+0x580, "stidc"
+0x780, "mtidc"
+0xA80, "vstidc"
 0x600, "hstatus"
 0x602, "hedeleg"
 0x603, "hideleg"
@@ -244,6 +248,7 @@
 0x3ed, "pmpaddr61"
 0x3ee, "pmpaddr62"
 0x3ef, "pmpaddr63"
+0x416, "ddc"
 0x747, "mseccfg"
 0x7a0, "tselect"
 0x7a1, "tdata1"
@@ -257,6 +262,9 @@
 0x7b1, "dpc"
 0x7b2, "dscratch0"
 0x7b3, "dscratch1"
+0x7ba, "drootcsel"
+0x7bc, "dddc"
+0x7bd, "drootc"
 0xB00, "mcycle"
 0xB02, "minstret"
 0xB03, "mhpmcounter3"

extensions/unratified/rv64_y_zba

@@ -0,0 +1,6 @@
+sh1addy.uw  rd rs1 rs2 31..25=16 14..12=3 6..2=0x0E 1..0=3
+sh2addy.uw  rd rs1 rs2 31..25=16 14..12=5 6..2=0x0E 1..0=3
+sh3addy.uw  rd rs1 rs2 31..25=16 14..12=0 6..2=0x0E 1..0=3
+sh4addy.uw  rd rs1 rs2 31..25=16 14..12=7 6..2=0x0E 1..0=3
+
+sh4addy     rd rs1 rs2 31..25=16 14..12=7 6..2=0x0C 1..0=3

extensions/unratified/rv_y

@@ -0,0 +1,35 @@
+ly                rd rs1          imm12   14..12=4 6..2=0x03 1..0=3
+sy                imm12hi rs1 rs2 imm12lo 14..12=4 6..2=0x08 1..0=3
+
+#next to ADDIW
+addiy             rd rs1          imm12   14..12=2 6..2=0x06 1..0=3
+
+#not sure how to code it but we can restrict rd==rs1 and make the other code-points illegal
+ybndswi           rd rs1 31..30=0x0 zimm10 14..12=3 6..2=0x06 1..0=3
+
+#if rs2=x0 decode as ymv
+addy              rd rs1 rs2_n0     31..25=6 14..12=0 6..2=0x0C 1..0=3
+ymv               rd rs1 24..20=0x0 31..25=6 14..12=0 6..2=0x0C 1..0=3
+yaddrw            rd rs1 rs2      31..25=6 14..12=1 6..2=0x0C 1..0=3
+ypermc            rd rs1 rs2      31..25=6 14..12=2 6..2=0x0C 1..0=3
+syeq              rd rs1 rs2      31..25=6 14..12=4 6..2=0x0C 1..0=3
+ylt               rd rs1 rs2      31..25=6 14..12=6 6..2=0x0C 1..0=3
+
+ybndsw            rd rs1 rs2      31..25=7 14..12=0 6..2=0x0C 1..0=3
+ybndsrw           rd rs1 rs2      31..25=7 14..12=1 6..2=0x0C 1..0=3
+ysunseal          rd rs1 rs2      31..25=7 14..12=2 6..2=0x0C 1..0=3
+
+ytagr             rd rs1 31..25=8 24..20=0 14..12=0 6..2=0x0C 1..0=3
+ypermr            rd rs1 31..25=8 24..20=1 14..12=0 6..2=0x0C 1..0=3
+ytyper            rd rs1 31..25=8 24..20=2 14..12=0 6..2=0x0C 1..0=3
+ybaser            rd rs1 31..25=8 24..20=5 14..12=0 6..2=0x0C 1..0=3
+ylenr             rd rs1 31..25=8 24..20=6 14..12=0 6..2=0x0C 1..0=3
+yamask            rd rs1 31..25=8 24..20=7 14..12=0 6..2=0x0C 1..0=3
+
+#regular encodings for double width datatype
+amoswap.y         rd rs1 rs2      aq rl 31..29=0 28..27=1 14..12=4 6..2=0x0B 1..0=3
+lr.y              rd rs1 24..20=0 aq rl 31..29=0 28..27=2 14..12=4 6..2=0x0B 1..0=3
+sc.y              rd rs1 rs2      aq rl 31..29=0 28..27=3 14..12=4 6..2=0x0B 1..0=3
+
+packy                       rd rs1 31..27=0 26..20=0x40 14..12=0x5 6..2=0x0C 1..0=3
+$pseudo_op rv_y::packy yhir rd rs1 31..27=0 26..20=0x40 14..12=0x5 6..2=0x0C 1..0=3

extensions/unratified/rv_y_c

@@ -0,0 +1,2 @@
+c.ymv rd_n0 c_rs2_n0                      1..0=2 15..13=4 12=0
+

extensions/unratified/rv_y_h

@@ -0,0 +1,2 @@
+hlv.y            rd rs1 24..20=0x0 31..25=0x38 14..12=4 6..2=0x1C 1..0=3
+hsv.y       11..7=0 rs1        rs2 31..25=0x39 14..12=4 6..2=0x1C 1..0=3

extensions/unratified/rv_zybld

@@ -0,0 +1 @@
+ybld              rd rs1 rs2      31..25=6 14..12=5 6..2=0x0C 1..0=3

extensions/unratified/rv_zybndsrdw

@@ -0,0 +1 @@
+ybndsrdw             rd rs1 rs2 31..25=7 14..12=3 6..2=0x0C 1..0=3

extensions/unratified/rv_zyhybrid

@@ -0,0 +1,8 @@
+
+#read/write mode bit
+ymoder            rd rs1 31..25=8 24..20=3 14..12=0 6..2=0x0C 1..0=3
+ymodew            rd rs1 rs2      31..25=6 14..12=7 6..2=0x0C 1..0=3
+
+#mode switch
+ymodeswy        31..25=9  24..15=0 14..12=1 11..7=0 6..2=0x0C 1..0=3
+ymodeswi        31..25=10 24..15=0 14..12=1 11..7=0 6..2=0x0C 1..0=3

extensions/unratified/rv_zysentry

@@ -0,0 +1 @@
+ysentry           rd rs1 31..25=8 24..20=8 14..12=0 6..2=0x0C 1..0=3