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variant(h5e-f): add generic H5E5ZJT, H5H5KT and H5F5ZJT
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 3910fbd commit 3f60556

4 files changed

Lines changed: 304 additions & 2 deletions

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‎README.md‎

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Original file line numberDiff line numberDiff line change
@@ -593,6 +593,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| Status | Device(s) | Name | Release | Notes |
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| :----: | :-------: | ---- | :-----: | :---- |
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| :yellow_heart: | STM32H5E5ZJ<br>STM32H5E5ZK | Generic Board | **3.0.1** | |
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| :yellow_heart: | STM32H5F5ZJ | Generic Board | **3.0.1** | |
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| :green_heart: | STM32H503CB | Generic Board | *2.9.0* | |
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| :green_heart: | STM32H503KB | Generic Board | *2.8.1* | |
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| :green_heart: | STM32H503RB | Generic Board | *2.7.0* | |

‎boards.txt‎

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@@ -9486,6 +9486,33 @@ GenH5.menu.pnum.WEACT_H562RG.build.variant_h=variant_WEACT_H562RG.h
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GenH5.menu.pnum.WEACT_H562RG.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
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GenH5.menu.pnum.WEACT_H562RG.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H562.svd
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# Generic H5E5ZJTx
9490+
GenH5.menu.pnum.GENERIC_H5E5ZJTX=Generic H5E5ZJTx
9491+
GenH5.menu.pnum.GENERIC_H5E5ZJTX.upload.maximum_size=4194304
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GenH5.menu.pnum.GENERIC_H5E5ZJTX.upload.maximum_data_size=1572864
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GenH5.menu.pnum.GENERIC_H5E5ZJTX.build.board=GENERIC_H5E5ZJTX
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GenH5.menu.pnum.GENERIC_H5E5ZJTX.build.product_line=STM32H5E5xx
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GenH5.menu.pnum.GENERIC_H5E5ZJTX.build.variant=STM32H5xx/H5E5Z(J-K)T_H5F5ZJT
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GenH5.menu.pnum.GENERIC_H5E5ZJTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H5E5.svd
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# Generic H5E5ZKTx
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GenH5.menu.pnum.GENERIC_H5E5ZKTX=Generic H5E5ZKTx
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GenH5.menu.pnum.GENERIC_H5E5ZKTX.upload.maximum_size=3145728
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GenH5.menu.pnum.GENERIC_H5E5ZKTX.upload.maximum_data_size=1572864
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GenH5.menu.pnum.GENERIC_H5E5ZKTX.build.board=GENERIC_H5E5ZKTX
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GenH5.menu.pnum.GENERIC_H5E5ZKTX.build.product_line=STM32H5E5xx
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GenH5.menu.pnum.GENERIC_H5E5ZKTX.build.variant=STM32H5xx/H5E5Z(J-K)T_H5F5ZJT
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GenH5.menu.pnum.GENERIC_H5E5ZKTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H5E5.svd
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# Generic H5F5ZJTx
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GenH5.menu.pnum.GENERIC_H5F5ZJTX=Generic H5F5ZJTx
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GenH5.menu.pnum.GENERIC_H5F5ZJTX.upload.maximum_size=4194304
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GenH5.menu.pnum.GENERIC_H5F5ZJTX.upload.maximum_data_size=1572864
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GenH5.menu.pnum.GENERIC_H5F5ZJTX.build.board=GENERIC_H5F5ZJTX
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GenH5.menu.pnum.GENERIC_H5F5ZJTX.build.product_line=STM32H5F5xx
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GenH5.menu.pnum.GENERIC_H5F5ZJTX.build.variant=STM32H5xx/H5E5Z(J-K)T_H5F5ZJT
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GenH5.menu.pnum.GENERIC_H5F5ZJTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H5F5.svd
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# Generic H503CBTx
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GenH5.menu.pnum.GENERIC_H503CBTX=Generic H503CBTx
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GenH5.menu.pnum.GENERIC_H503CBTX.upload.maximum_size=131072

‎variants/STM32H5xx/H5E5Z(J-K)T_H5F5ZJT/generic_clock.c‎

Lines changed: 86 additions & 2 deletions
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@@ -21,8 +21,92 @@
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*/
2222
WEAK void SystemClock_Config(void)
2323
{
24-
/* SystemClock_Config can be generated by STM32CubeMX */
25-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
24+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
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/** Configure the main internal regulator output voltage
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
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while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
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| RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_CSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV2;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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RCC_OscInitStruct.CSIState = RCC_CSI_ON;
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RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
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RCC_OscInitStruct.PLL.PLLM = 1;
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RCC_OscInitStruct.PLL.PLLN = 125;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
59+
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/** Initializes the CPU, AHB and APB buses clocks
61+
*/
62+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
63+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
64+
| RCC_CLOCKTYPE_PCLK3;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
72+
Error_Handler();
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}
74+
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/** Configure the programming delay
76+
*/
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__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
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79+
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/** Initializes the peripherals clock
81+
*/
82+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
83+
#if defined(USBCON)
84+
#if defined(USE_USB_HS)
85+
#warning "USB HS is not supported with the default 'SystemClock_Config', please configure it manually."
86+
#else
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| RCC_PERIPHCLK_USB
88+
#endif
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#endif
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;
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PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
92+
#if defined(USBCON) && !defined(USE_USB_HS)
93+
PeriphClkInitStruct.OtgfsClockSelection = RCC_OTGFSCLKSOURCE_HSI48;
94+
#endif
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PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
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PeriphClkInitStruct.PLL2.PLL2M = 1;
97+
PeriphClkInitStruct.PLL2.PLL2N = 125;
98+
PeriphClkInitStruct.PLL2.PLL2P = 2;
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PeriphClkInitStruct.PLL2.PLL2Q = 2;
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PeriphClkInitStruct.PLL2.PLL2R = 4;
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PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
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PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
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PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
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PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVR;
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PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
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PeriphClkInitStruct.DacLowPowerClockSelection = RCC_DACLPCLKSOURCE_LSI;
107+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
108+
Error_Handler();
109+
}
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}
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#endif /* ARDUINO_GENERIC_* */
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/*
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******************************************************************************
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**
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** @file : LinkerScript.ld
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**
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** @author : Auto-generated by STM32CubeIDE
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**
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** @brief : Linker script for STM32H5E5ZJTx Device from STM32H5 series
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** 4096KBytes FLASH
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** 1536KBytes RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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******************************************************************************
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** @attention
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**
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** Copyright (c) 2026 STMicroelectronics.
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** All rights reserved.
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**
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** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
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** If no LICENSE file comes with this software, it is provided AS-IS.
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**
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******************************************************************************
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*/
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35+
/* Entry Point */
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ENTRY(Reset_Handler)
37+
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/* Highest address of the user mode stack */
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_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
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_sstack = _estack - _Min_Stack_Size;
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Memories definition */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
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FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
50+
}
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/* Sections */
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SECTIONS
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{
55+
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/* The startup code into "FLASH" Rom type memory */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data into "FLASH" Rom type memory */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data into "FLASH" Rom type memory */
82+
.rodata :
83+
{
84+
. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >FLASH
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.ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
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{
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. = ALIGN(4);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
94+
. = ALIGN(4);
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} >FLASH
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.ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
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{
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. = ALIGN(4);
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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. = ALIGN(4);
104+
} >FLASH
105+
106+
.preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
107+
{
108+
. = ALIGN(4);
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
113+
} >FLASH
114+
115+
.init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
116+
{
117+
. = ALIGN(4);
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PROVIDE_HIDDEN (__init_array_start = .);
119+
KEEP (*(SORT(.init_array.*)))
120+
KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
123+
} >FLASH
124+
125+
.fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
126+
{
127+
. = ALIGN(4);
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PROVIDE_HIDDEN (__fini_array_start = .);
129+
KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(4);
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} >FLASH
134+
135+
/* Used by the startup to initialize data */
136+
_sidata = LOADADDR(.data);
137+
138+
/* Initialized data sections into "RAM" Ram type memory */
139+
.data :
140+
{
141+
. = ALIGN(4);
142+
_sdata = .; /* create a global symbol at data start */
143+
*(.data) /* .data sections */
144+
*(.data*) /* .data* sections */
145+
*(.RamFunc) /* .RamFunc sections */
146+
*(.RamFunc*) /* .RamFunc* sections */
147+
148+
. = ALIGN(4);
149+
_edata = .; /* define a global symbol at data end */
150+
151+
} >RAM AT> FLASH
152+
153+
/* Uninitialized data section into "RAM" Ram type memory */
154+
. = ALIGN(4);
155+
.bss :
156+
{
157+
/* This is used by the startup in order to initialize the .bss section */
158+
_sbss = .; /* define a global symbol at bss start */
159+
__bss_start__ = _sbss;
160+
*(.bss)
161+
*(.bss*)
162+
*(COMMON)
163+
164+
. = ALIGN(4);
165+
_ebss = .; /* define a global symbol at bss end */
166+
__bss_end__ = _ebss;
167+
} >RAM
168+
169+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
170+
._user_heap_stack :
171+
{
172+
. = ALIGN(8);
173+
PROVIDE ( end = . );
174+
PROVIDE ( _end = . );
175+
. = . + _Min_Heap_Size;
176+
. = . + _Min_Stack_Size;
177+
. = ALIGN(8);
178+
} >RAM
179+
180+
/* Remove information from the compiler libraries */
181+
/DISCARD/ :
182+
{
183+
libc.a ( * )
184+
libm.a ( * )
185+
libgcc.a ( * )
186+
}
187+
188+
.ARM.attributes 0 : { *(.ARM.attributes) }
189+
}

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