@@ -139,18 +139,14 @@ void SystemClock_Config(void)
   if (HAL_UpdateCoreClock() != HAL_OK) {
     Error_Handler();
   }
-
-  /* Peripherals using PCLK3 (36 MHz):
-  LPUART1
-  */
-
   /* Peripherals using HSIDIV3 (48 MHz):
     USB
   */
   if (HAL_RCC_HSIDIV3_Enable() != HAL_OK) {
     Error_Handler();
   }
 
+  HAL_RCC_CK48_SetKernelClkSource(HAL_RCC_CK48_CLK_SRC_HSIDIV3);
 }
 
 #ifdef __cplusplus
Original file line number	Diff line number	Diff line change
`@@ -139,18 +139,14 @@ void SystemClock_Config(void)`
`139`	`139`	`if (HAL_UpdateCoreClock() != HAL_OK) {`
`140`	`140`	`Error_Handler();`
`141`	`141`	`}`
`142`		`-`
`143`		`- /* Peripherals using PCLK3 (36 MHz):`
`144`		`- LPUART1`
`145`		`- */`
`146`		`-`
`147`	`142`	`/* Peripherals using HSIDIV3 (48 MHz):`
`148`	`143`	`USB`
`149`	`144`	`*/`
`150`	`145`	`if (HAL_RCC_HSIDIV3_Enable() != HAL_OK) {`
`151`	`146`	`Error_Handler();`
`152`	`147`	`}`
`153`	`148`
	`149`	`+ HAL_RCC_CK48_SetKernelClkSource(HAL_RCC_CK48_CLK_SRC_HSIDIV3);`
`154`	`150`	`}`
`155`	`151`
`156`	`152`	`#ifdef __cplusplus`