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variants(G4): add Phoque1 and Phoque2 brushless driver variants
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 4a8b28a commit 5c61eae

9 files changed

Lines changed: 1094 additions & 43 deletions

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‎README.md‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -530,6 +530,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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531531
| Status | Device(s) | Name | Release | Notes |
532532
| :----: | :-------: | ---- | :-----: | :---- |
533+
| :yellow_heart: | STM32G431VB | Phoque 1 Brushless Motor Driver | **3.0.1* | |
534+
| :yellow_heart: | STM32G431CBU | Phoque 2 Brushless Motor Driver | **3.0.1* | |
533535
| :green_heart: | STM32G474CEU | WeAct G474CE | *2.10.0* | [More info](https://github.com/WeActStudio/WeActStudio.STM32G474CoreBoard) |
534536
| :green_heart: | STM32G431C6<br>STM32G431C8<br>STM32G431CB | Generic Board | *2.4.0* | |
535537
| :green_heart: | STM32G431C6U<br>STM32G431C8U<br>STM32G431CBU | Generic Board | *2.0.0* | |

‎boards.txt‎

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8164,6 +8164,26 @@ GenG4.openocd.target=stm32g4x
81648164
GenG4.vid.0=0x0483
81658165
GenG4.pid.0=0x5740
81668166

8167+
# Phoque 1 Brushless Motor Driver
8168+
GenG4.menu.pnum.PHOQUE1=Phoque 1
8169+
GenG4.menu.pnum.PHOQUE1.upload.maximum_size=131072
8170+
GenG4.menu.pnum.PHOQUE1.upload.maximum_data_size=32768
8171+
GenG4.menu.pnum.PHOQUE1.build.board=PHOQUE1
8172+
GenG4.menu.pnum.PHOQUE1.build.product_line=STM32G431xx
8173+
GenG4.menu.pnum.PHOQUE1.build.variant=STM32G4xx/G431V(6-8-B)T_G441VBT
8174+
GenG4.menu.pnum.PHOQUE1.build.variant_h=variant_{build.board}.h
8175+
GenG4.menu.pnum.PHOQUE1.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G431.svd
8176+
8177+
# Phoque 2 Brushless Motor Driver
8178+
GenG4.menu.pnum.PHOQUE2=Phoque 2
8179+
GenG4.menu.pnum.PHOQUE2.upload.maximum_size=131072
8180+
GenG4.menu.pnum.PHOQUE2.upload.maximum_data_size=32768
8181+
GenG4.menu.pnum.PHOQUE2.build.board=PHOQUE2
8182+
GenG4.menu.pnum.PHOQUE2.build.product_line=STM32G431xx
8183+
GenG4.menu.pnum.PHOQUE2.build.variant=STM32G4xx/G431C(6-8-B)U_G441CBU
8184+
GenG4.menu.pnum.PHOQUE2.build.variant_h=variant_{build.board}.h
8185+
GenG4.menu.pnum.PHOQUE2.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G431.svd
8186+
81678187
# WEACT_G474CE board
81688188
GenG4.menu.pnum.WEACT_G474CE=WeAct G474CE
81698189
GenG4.menu.pnum.WEACT_G474CE.upload.maximum_size=524288

‎cmake/boards_db.cmake‎

Lines changed: 207 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -2260,7 +2260,8 @@ target_link_options(BLACKPILL_F401CE_hid INTERFACE
22602260
-mcpu=${BLACKPILL_F401CE_hid_MCU}
22612261
)
22622262

2263-
# BLACKPILL_F411CE_25M
2263+
2264+
# BLACKPILL_F411CE
22642265
# -----------------------------------------------------------------------------
22652266

22662267
set(BLACKPILL_F411CE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
@@ -2340,48 +2341,6 @@ target_compile_options(BLACKPILL_F411CE_xusb_HSFS INTERFACE
23402341
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
23412342
)
23422343

2343-
# BLACKPILL_F411CE_25M_hid
2344-
# -----------------------------------------------------------------------------
2345-
2346-
set(BLACKPILL_F411CE_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
2347-
set(BLACKPILL_F411CE_hid_MAXSIZE 524288)
2348-
set(BLACKPILL_F411CE_hid_MAXDATASIZE 131072)
2349-
set(BLACKPILL_F411CE_hid_MCU cortex-m4)
2350-
set(BLACKPILL_F411CE_hid_FPCONF "-")
2351-
add_library(BLACKPILL_F411CE_hid INTERFACE)
2352-
target_compile_options(BLACKPILL_F411CE_hid INTERFACE
2353-
"SHELL:-DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER"
2354-
"SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID"
2355-
"SHELL:-DCUSTOM_PERIPHERAL_PINS"
2356-
"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
2357-
-mcpu=${BLACKPILL_F411CE_hid_MCU}
2358-
)
2359-
target_compile_definitions(BLACKPILL_F411CE_hid INTERFACE
2360-
"STM32F4xx"
2361-
"ARDUINO_BLACKPILL_F411CE"
2362-
"BOARD_NAME=\"BLACKPILL_F411CE\""
2363-
"BOARD_ID=BLACKPILL_F411CE"
2364-
"VARIANT_H=\"variant_BLACKPILL_F411CE.h\""
2365-
)
2366-
target_include_directories(BLACKPILL_F411CE_hid INTERFACE
2367-
${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
2368-
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
2369-
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
2370-
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
2371-
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/
2372-
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
2373-
${BLACKPILL_F411CE_hid_VARIANT_PATH}
2374-
)
2375-
2376-
target_link_options(BLACKPILL_F411CE_hid INTERFACE
2377-
"LINKER:--default-script=${BLACKPILL_F411CE_hid_VARIANT_PATH}/ldscript.ld"
2378-
"LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
2379-
"LINKER:--defsym=LD_MAX_SIZE=524288"
2380-
"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
2381-
"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
2382-
-mcpu=${BLACKPILL_F411CE_hid_MCU}
2383-
)
2384-
23852344
# BLACKPILL_F411CE_8M
23862345
# -----------------------------------------------------------------------------
23872346

@@ -2504,6 +2463,50 @@ target_link_options(BLACKPILL_F411CE_8M_hid INTERFACE
25042463
-mcpu=${BLACKPILL_F411CE_8M_hid_MCU}
25052464
)
25062465

2466+
2467+
# BLACKPILL_F411CE_hid
2468+
# -----------------------------------------------------------------------------
2469+
2470+
set(BLACKPILL_F411CE_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F411C(C-E)(U-Y)")
2471+
set(BLACKPILL_F411CE_hid_MAXSIZE 524288)
2472+
set(BLACKPILL_F411CE_hid_MAXDATASIZE 131072)
2473+
set(BLACKPILL_F411CE_hid_MCU cortex-m4)
2474+
set(BLACKPILL_F411CE_hid_FPCONF "-")
2475+
add_library(BLACKPILL_F411CE_hid INTERFACE)
2476+
target_compile_options(BLACKPILL_F411CE_hid INTERFACE
2477+
"SHELL:-DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER"
2478+
"SHELL:-DSTM32F411xE -DHAL_UART_MODULE_ENABLED -DBL_HID"
2479+
"SHELL:-DCUSTOM_PERIPHERAL_PINS"
2480+
"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
2481+
-mcpu=${BLACKPILL_F411CE_hid_MCU}
2482+
)
2483+
target_compile_definitions(BLACKPILL_F411CE_hid INTERFACE
2484+
"STM32F4xx"
2485+
"ARDUINO_BLACKPILL_F411CE"
2486+
"BOARD_NAME=\"BLACKPILL_F411CE\""
2487+
"BOARD_ID=BLACKPILL_F411CE"
2488+
"VARIANT_H=\"variant_BLACKPILL_F411CE.h\""
2489+
)
2490+
target_include_directories(BLACKPILL_F411CE_hid INTERFACE
2491+
${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx
2492+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc
2493+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src
2494+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
2495+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/
2496+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/
2497+
${BLACKPILL_F411CE_hid_VARIANT_PATH}
2498+
)
2499+
2500+
target_link_options(BLACKPILL_F411CE_hid INTERFACE
2501+
"LINKER:--default-script=${BLACKPILL_F411CE_hid_VARIANT_PATH}/ldscript.ld"
2502+
"LINKER:--defsym=LD_FLASH_OFFSET=0x4000"
2503+
"LINKER:--defsym=LD_MAX_SIZE=524288"
2504+
"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
2505+
"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
2506+
-mcpu=${BLACKPILL_F411CE_hid_MCU}
2507+
)
2508+
2509+
25072510
# BLUE_F407VE_MINI
25082511
# -----------------------------------------------------------------------------
25092512

@@ -4645,6 +4648,7 @@ target_link_options(DATABOARD_hid INTERFACE
46454648
-mcpu=${DATABOARD_hid_MCU}
46464649
)
46474650

4651+
46484652
# DEMO_F030F4
46494653
# -----------------------------------------------------------------------------
46504654

@@ -112106,6 +112110,166 @@ target_compile_options(P_NUCLEO_WB55RG_xusb_HSFS INTERFACE
112106112110
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
112107112111
)
112108112112

112113+
# PHOQUE1
112114+
# -----------------------------------------------------------------------------
112115+
112116+
set(PHOQUE1_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431V(6-8-B)T_G441VBT")
112117+
set(PHOQUE1_MAXSIZE 131072)
112118+
set(PHOQUE1_MAXDATASIZE 32768)
112119+
set(PHOQUE1_MCU cortex-m4)
112120+
set(PHOQUE1_FPCONF "-")
112121+
add_library(PHOQUE1 INTERFACE)
112122+
target_compile_options(PHOQUE1 INTERFACE
112123+
"SHELL:-DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER"
112124+
"SHELL:-DSTM32G431xx"
112125+
"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
112126+
-mcpu=${PHOQUE1_MCU}
112127+
)
112128+
target_compile_definitions(PHOQUE1 INTERFACE
112129+
"STM32G4xx"
112130+
"ARDUINO_PHOQUE"
112131+
"ARDUINO_PHOQUE1"
112132+
"BOARD_NAME=\"PHOQUE1\""
112133+
"BOARD_ID=PHOQUE1"
112134+
"VARIANT_H=\"variant_PHOQUE1.h\""
112135+
)
112136+
target_include_directories(PHOQUE1 INTERFACE
112137+
${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
112138+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
112139+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
112140+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
112141+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/
112142+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
112143+
${PHOQUE1_VARIANT_PATH}
112144+
)
112145+
112146+
target_link_options(PHOQUE1 INTERFACE
112147+
"LINKER:--default-script=${PHOQUE1_VARIANT_PATH}/ldscript.ld"
112148+
"LINKER:--defsym=LD_FLASH_OFFSET=0x0"
112149+
"LINKER:--defsym=LD_MAX_SIZE=131072"
112150+
"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
112151+
"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
112152+
-mcpu=${PHOQUE1_MCU}
112153+
)
112154+
112155+
add_library(PHOQUE1_serial_disabled INTERFACE)
112156+
target_compile_options(PHOQUE1_serial_disabled INTERFACE
112157+
)
112158+
add_library(PHOQUE1_serial_generic INTERFACE)
112159+
target_compile_options(PHOQUE1_serial_generic INTERFACE
112160+
"SHELL:-DHAL_UART_MODULE_ENABLED"
112161+
)
112162+
add_library(PHOQUE1_serial_none INTERFACE)
112163+
target_compile_options(PHOQUE1_serial_none INTERFACE
112164+
"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
112165+
)
112166+
add_library(PHOQUE1_usb_CDC INTERFACE)
112167+
target_compile_options(PHOQUE1_usb_CDC INTERFACE
112168+
"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
112169+
)
112170+
add_library(PHOQUE1_usb_CDCgen INTERFACE)
112171+
target_compile_options(PHOQUE1_usb_CDCgen INTERFACE
112172+
"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
112173+
)
112174+
add_library(PHOQUE1_usb_HID INTERFACE)
112175+
target_compile_options(PHOQUE1_usb_HID INTERFACE
112176+
"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
112177+
)
112178+
add_library(PHOQUE1_usb_none INTERFACE)
112179+
target_compile_options(PHOQUE1_usb_none INTERFACE
112180+
)
112181+
add_library(PHOQUE1_xusb_FS INTERFACE)
112182+
target_compile_options(PHOQUE1_xusb_FS INTERFACE
112183+
)
112184+
add_library(PHOQUE1_xusb_HS INTERFACE)
112185+
target_compile_options(PHOQUE1_xusb_HS INTERFACE
112186+
"SHELL:-DUSE_USB_HS"
112187+
)
112188+
add_library(PHOQUE1_xusb_HSFS INTERFACE)
112189+
target_compile_options(PHOQUE1_xusb_HSFS INTERFACE
112190+
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
112191+
)
112192+
112193+
# PHOQUE2
112194+
# -----------------------------------------------------------------------------
112195+
112196+
set(PHOQUE2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G431C(6-8-B)U_G441CBU")
112197+
set(PHOQUE2_MAXSIZE 131072)
112198+
set(PHOQUE2_MAXDATASIZE 32768)
112199+
set(PHOQUE2_MCU cortex-m4)
112200+
set(PHOQUE2_FPCONF "-")
112201+
add_library(PHOQUE2 INTERFACE)
112202+
target_compile_options(PHOQUE2 INTERFACE
112203+
"SHELL:-DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER"
112204+
"SHELL:-DSTM32G431xx"
112205+
"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
112206+
-mcpu=${PHOQUE2_MCU}
112207+
)
112208+
target_compile_definitions(PHOQUE2 INTERFACE
112209+
"STM32G4xx"
112210+
"ARDUINO_PHOQUE"
112211+
"ARDUINO_PHOQUE2"
112212+
"BOARD_NAME=\"PHOQUE2\""
112213+
"BOARD_ID=PHOQUE2"
112214+
"VARIANT_H=\"variant_PHOQUE2.h\""
112215+
)
112216+
target_include_directories(PHOQUE2 INTERFACE
112217+
${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
112218+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
112219+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
112220+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
112221+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/
112222+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
112223+
${PHOQUE2_VARIANT_PATH}
112224+
)
112225+
112226+
target_link_options(PHOQUE2 INTERFACE
112227+
"LINKER:--default-script=${PHOQUE2_VARIANT_PATH}/ldscript.ld"
112228+
"LINKER:--defsym=LD_FLASH_OFFSET=0x0"
112229+
"LINKER:--defsym=LD_MAX_SIZE=131072"
112230+
"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
112231+
"SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
112232+
-mcpu=${PHOQUE2_MCU}
112233+
)
112234+
112235+
add_library(PHOQUE2_serial_disabled INTERFACE)
112236+
target_compile_options(PHOQUE2_serial_disabled INTERFACE
112237+
)
112238+
add_library(PHOQUE2_serial_generic INTERFACE)
112239+
target_compile_options(PHOQUE2_serial_generic INTERFACE
112240+
"SHELL:-DHAL_UART_MODULE_ENABLED"
112241+
)
112242+
add_library(PHOQUE2_serial_none INTERFACE)
112243+
target_compile_options(PHOQUE2_serial_none INTERFACE
112244+
"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
112245+
)
112246+
add_library(PHOQUE2_usb_CDC INTERFACE)
112247+
target_compile_options(PHOQUE2_usb_CDC INTERFACE
112248+
"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
112249+
)
112250+
add_library(PHOQUE2_usb_CDCgen INTERFACE)
112251+
target_compile_options(PHOQUE2_usb_CDCgen INTERFACE
112252+
"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
112253+
)
112254+
add_library(PHOQUE2_usb_HID INTERFACE)
112255+
target_compile_options(PHOQUE2_usb_HID INTERFACE
112256+
"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
112257+
)
112258+
add_library(PHOQUE2_usb_none INTERFACE)
112259+
target_compile_options(PHOQUE2_usb_none INTERFACE
112260+
)
112261+
add_library(PHOQUE2_xusb_FS INTERFACE)
112262+
target_compile_options(PHOQUE2_xusb_FS INTERFACE
112263+
)
112264+
add_library(PHOQUE2_xusb_HS INTERFACE)
112265+
target_compile_options(PHOQUE2_xusb_HS INTERFACE
112266+
"SHELL:-DUSE_USB_HS"
112267+
)
112268+
add_library(PHOQUE2_xusb_HSFS INTERFACE)
112269+
target_compile_options(PHOQUE2_xusb_HSFS INTERFACE
112270+
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
112271+
)
112272+
112109112273
# PRNTR_V1
112110112274
# -----------------------------------------------------------------------------
112111112275

‎variants/STM32G4xx/G431C(6-8-B)U_G441CBU/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
2424
PeripheralPins_B_G431B_ESC1.c
2525
variant_B_G431B_ESC1.cpp
2626
variant_generic.cpp
27+
variant_PHOQUE2.cpp
2728
)
2829
target_link_libraries(variant_bin PUBLIC variant_usage)
2930

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