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feat(xiao): add Seeed XIAO STM32C5 board support
Variant, linker script and boards.txt entry for the Seeed Studio XIAO STM32C5 (STM32C5A3CG). Boards ship with a TinyUF2 bootloader in the first 32 KiB, so build.flash_offset is 0x8000 and USB CDC is the default serial configuration. Assisted-By: Claude <noreply@anthropic.com> Signed-off-by: cumin <13809292481@163.com>
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‎boards.txt‎

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Original file line numberDiff line numberDiff line change
@@ -17229,6 +17229,52 @@ Phoque.menu.upload_method.OpenOCDDapLink.upload.tool=openocd_upload
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Phoque.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.0=interface/cmsis-dap.cfg
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Phoque.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.1={runtime.platform.path}/debugger/select_swd.cfg
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################################################################################
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# Seeed Studio
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# Docs: url=https://www.seeedstudio.com/
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Seeed_studio.name=Seeed Studio
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Seeed_studio.build.core=arduino
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Seeed_studio.build.board=Seeed_studio
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Seeed_studio.build.family=SEEED_STUDIO
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Seeed_studio.build.variant_h=variant_{build.board}.h
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Seeed_studio.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
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Seeed_studio.build.flash_offset=0x0
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Seeed_studio.upload.maximum_size=0
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Seeed_studio.upload.maximum_data_size=0
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Seeed_studio.vid.0=0x2886
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Seeed_studio.pid.0=0x80C5
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# Seeed XIAO STM32C5
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# Docs: url=https://www.seeedstudio.com/XIAO-STM32C5-p-7011.html
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# Docs: mcu=STM32C5A3CG
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Seeed_studio.menu.pnum.XIAO_STM32C5=Seeed XIAO STM32C5
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Seeed_studio.menu.pnum.XIAO_STM32C5.upload.maximum_size=1015808
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Seeed_studio.menu.pnum.XIAO_STM32C5.upload.maximum_data_size=262144
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.mcu=cortex-m33
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.fpu=-mfpu=fpv5-sp-d16
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.float-abi=-mfloat-abi=hard
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.board=XIAO_STM32C5
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.series=STM32C5xx
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.product_line=STM32C5A3xx
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.variant_h=variant_XIAO_STM32C5.h
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.ldscript=ldscript_XIAO_STM32C5.ld
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.hal=-DUSE_HALV2_DRIVER
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.flash_offset=0x8000
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Seeed_studio.menu.pnum.XIAO_STM32C5.build.st_extra_flags=-D{build.product_line} -DHSE_VALUE=48000000U -DUSBD_SELF_POWERED=1 -DUSBD_MAX_POWER=50 {build.enable_usb} {build.xSerial}
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Seeed_studio.menu.pnum.XIAO_STM32C5.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C5A3.svd
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# Upload menu
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Seeed_studio.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
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Seeed_studio.menu.upload_method.swdMethod.upload.protocol=swd
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Seeed_studio.menu.upload_method.swdMethod.upload.options=-a {upload.address} -m {upload.mode} -s {upload.start} -f {upload.freq} -n {upload.stlink_sn}
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Seeed_studio.menu.upload_method.swdMethod.upload.tool=stm32CubeProg
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Seeed_studio.menu.upload_method.jlinkMethod=STM32CubeProgrammer (J-Link)
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Seeed_studio.menu.upload_method.jlinkMethod.upload.protocol=jlink
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Seeed_studio.menu.upload_method.jlinkMethod.upload.options=-a {upload.address} -s {upload.start}
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Seeed_studio.menu.upload_method.jlinkMethod.upload.tool=stm32CubeProg
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################################################################################
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# Serialx activation
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Nucleo_144.menu.xserial.generic=Enabled (generic 'Serial')
@@ -17496,6 +17542,12 @@ Phoque.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
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Phoque.menu.xserial.disabled=Disabled (no Serial support)
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Phoque.menu.xserial.disabled.build.xSerial=
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Seeed_studio.menu.xserial.generic=Enabled (generic 'Serial')
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Seeed_studio.menu.xserial.none=Enabled (no generic 'Serial')
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Seeed_studio.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
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Seeed_studio.menu.xserial.disabled=Disabled (no Serial support)
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Seeed_studio.menu.xserial.disabled.build.xSerial=
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# USB connectivity
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Nucleo_144.menu.usb.none=None
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Nucleo_144.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART)
@@ -17890,6 +17942,12 @@ Phoque.menu.xusb.HS.build.usb_speed=-DUSE_USB_HS
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Phoque.menu.xusb.HSFS=High Speed in Full Speed mode
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Phoque.menu.xusb.HSFS.build.usb_speed=-DUSE_USB_HS -DUSE_USB_HS_IN_FS
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Seeed_studio.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART)
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Seeed_studio.menu.usb.CDCgen.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC
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Seeed_studio.menu.usb.none=None
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Seeed_studio.menu.usb.CDC=CDC (no generic 'Serial')
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Seeed_studio.menu.usb.CDC.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB
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# Optimizations
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Nucleo_144.menu.opt.osstd=Smallest (-Os default)
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Nucleo_144.menu.opt.oslto=Smallest (-Os) with LTO
@@ -18751,6 +18809,24 @@ Phoque.menu.opt.ogstd.build.flags.optimize=-Og
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Phoque.menu.opt.o0std=No Optimization (-O0)
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Phoque.menu.opt.o0std.build.flags.optimize=-O0
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Seeed_studio.menu.opt.osstd=Smallest (-Os default)
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Seeed_studio.menu.opt.oslto=Smallest (-Os) with LTO
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Seeed_studio.menu.opt.oslto.build.flags.optimize=-Os -flto
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Seeed_studio.menu.opt.o1std=Fast (-O1)
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Seeed_studio.menu.opt.o1std.build.flags.optimize=-O1
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Seeed_studio.menu.opt.o1lto=Fast (-O1) with LTO
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Seeed_studio.menu.opt.o1lto.build.flags.optimize=-O1 -flto
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Seeed_studio.menu.opt.o2std=Faster (-O2)
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Seeed_studio.menu.opt.o2std.build.flags.optimize=-O2
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Seeed_studio.menu.opt.o2lto=Faster (-O2) with LTO
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Seeed_studio.menu.opt.o2lto.build.flags.optimize=-O2 -flto
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Seeed_studio.menu.opt.o3std=Fastest (-O3)
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Seeed_studio.menu.opt.o3std.build.flags.optimize=-O3
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Seeed_studio.menu.opt.o3lto=Fastest (-O3) with LTO
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Seeed_studio.menu.opt.o3lto.build.flags.optimize=-O3 -flto
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Seeed_studio.menu.opt.ogstd=Debug (-Og)
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Seeed_studio.menu.opt.ogstd.build.flags.optimize=-Og
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# Debug information
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Nucleo_144.menu.dbg.none=None
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Nucleo_144.menu.dbg.enable_sym=Symbols Enabled (-g)
@@ -19088,6 +19164,14 @@ Phoque.menu.dbg.enable_log.build.flags.debug=
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Phoque.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g)
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Phoque.menu.dbg.enable_all.build.flags.debug=-g
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Seeed_studio.menu.dbg.none=None
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Seeed_studio.menu.dbg.enable_sym=Symbols Enabled (-g)
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Seeed_studio.menu.dbg.enable_sym.build.flags.debug=-g -DNDEBUG
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Seeed_studio.menu.dbg.enable_log=Core logs Enabled
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Seeed_studio.menu.dbg.enable_log.build.flags.debug=
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Seeed_studio.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g)
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Seeed_studio.menu.dbg.enable_all.build.flags.debug=-g
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# C Runtime Library
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Nucleo_144.menu.rtlib.nano=Newlib Nano (default)
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Nucleo_144.menu.rtlib.nanofp=Newlib Nano + Float Printf
@@ -19518,3 +19602,13 @@ Phoque.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
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Phoque.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
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Phoque.menu.rtlib.full=Newlib Standard
1952019604
Phoque.menu.rtlib.full.build.flags.ldspecs=
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Seeed_studio.menu.rtlib.nano=Newlib Nano (default)
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Seeed_studio.menu.rtlib.nanofp=Newlib Nano + Float Printf
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Seeed_studio.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float
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Seeed_studio.menu.rtlib.nanofs=Newlib Nano + Float Scanf
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Seeed_studio.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float
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Seeed_studio.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
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Seeed_studio.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
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Seeed_studio.menu.rtlib.full=Newlib Standard
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Seeed_studio.menu.rtlib.full.build.flags.ldspecs=

‎docs/supported-boards/index.md‎

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@@ -1603,3 +1603,9 @@
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| --- | --- | --- | --- | --- |
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| Phoque 1 | [STM32G431VB](https://www.st.com/en/microcontrollers-microprocessors/stm32g431vb.html) | `PHOQUE1` | Next release | STSPIN32G4-based |
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| Phoque 2 | [STM32G431CB](https://www.st.com/en/microcontrollers-microprocessors/stm32g431cb.html) | `PHOQUE2` | Next release | |
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### [Seeed Studio boards](https://www.seeedstudio.com/)
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| Board | STM32 MCU | `build.board` | First release | Notes |
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| --- | --- | --- | --- | --- |
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| [Seeed XIAO STM32C5](https://www.seeedstudio.com/XIAO-STM32C5-p-7011.html) | [STM32C5A3CG](https://www.st.com/en/microcontrollers-microprocessors/stm32c5a3cg.html) | `XIAO_STM32C5` | Next release | |

‎variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/ldscript_XIAO_STM32C5.ld‎

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@@ -0,0 +1,173 @@
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/*
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* Copyright (c) 2026, Seeed Technology Co., Ltd.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* The application starts after the 32 KiB TinyUF2 bootloader. Memory sizes are
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* supplied by boards.txt through LD_MAX_SIZE and LD_MAX_DATA_SIZE.
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*/
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ENTRY(Reset_Handler)
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HEAP_SIZE = 0x2000;
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STACK_SIZE = 0x2000;
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MEMORY
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{
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ROM (rx) : org = 0x08000000 + LD_FLASH_OFFSET, len = LD_MAX_SIZE - LD_FLASH_OFFSET
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RAM (xrw) : org = 0x20000000, len = LD_MAX_DATA_SIZE
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}
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SECTIONS
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{
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.vectors :
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{
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. = ALIGN(8);
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KEEP(*(.vectors));
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. = ALIGN(8);
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} > ROM
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.text :
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{
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. = ALIGN(8);
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*(.text);
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*(.text*);
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*(.glue_7);
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*(.glue_7t);
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*(.eh_frame);
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KEEP(*(.init));
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KEEP(*(.fini));
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. = ALIGN(8);
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_etext = .;
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} > ROM
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.rodata :
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{
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. = ALIGN(8);
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*(.rodata);
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*(.rodata*);
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. = ALIGN(8);
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} > ROM
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.ARM.extab (READONLY) :
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{
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. = ALIGN(8);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. = ALIGN(8);
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} > ROM
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.ARM (READONLY) :
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{
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. = ALIGN(8);
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__exidx_start = .;
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*(.ARM.exidx*);
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__exidx_end = .;
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. = ALIGN(8);
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} > ROM
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.preinit_array (READONLY) :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN(__preinit_array_start = .);
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KEEP(*(.preinit_array*));
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PROVIDE_HIDDEN(__preinit_array_end = .);
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. = ALIGN(8);
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} > ROM
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.init_array (READONLY) :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN(__init_array_start = .);
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KEEP(*(SORT(.init_array.*)));
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KEEP(*(.init_array*));
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PROVIDE_HIDDEN(__init_array_end = .);
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. = ALIGN(8);
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} > ROM
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.fini_array (READONLY) :
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{
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. = ALIGN(8);
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PROVIDE_HIDDEN(__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)));
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KEEP(*(.fini_array*));
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PROVIDE_HIDDEN(__fini_array_end = .);
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. = ALIGN(8);
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} > ROM
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.copy.table (READONLY) :
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{
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. = ALIGN(8);
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__copy_table_start__ = .;
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LONG(LOADADDR(.data));
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LONG(ADDR(.data));
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LONG(SIZEOF(.data) / 4);
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__copy_table_end__ = .;
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} > ROM
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.zero.table (READONLY) :
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{
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. = ALIGN(8);
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__zero_table_start__ = .;
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LONG(ADDR(.bss));
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LONG(SIZEOF(.bss) / 4);
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__zero_table_end__ = .;
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} > ROM
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.data :
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{
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. = ALIGN(8);
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_sidata = LOADADDR(.data);
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__data_start__ = .;
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_sdata = .;
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*(.data);
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*(.data*);
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. = ALIGN(8);
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_edata = .;
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} > RAM AT> ROM
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.bss :
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{
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. = ALIGN(8);
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_sbss = .;
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__bss_start__ = _sbss;
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*(.bss);
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*(.bss*);
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*(COMMON);
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. = ALIGN(8);
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_ebss = .;
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__bss_end__ = _ebss;
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} > RAM
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.heap (NOLOAD) :
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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_heap_start = .;
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. += HEAP_SIZE;
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. = ALIGN(8);
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_heap_end = .;
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__HeapLimit = .;
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} > RAM
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.stack (NOLOAD) :
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{
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. = ALIGN(8);
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__StackLimit = .;
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. += STACK_SIZE;
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. = ALIGN(8);
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__StackTop = .;
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_estack = .;
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__stack = .;
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} > RAM
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/DISCARD/ :
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{
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libc.a(*);
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libm.a(*);
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libgcc.a(*);
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}
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.ARM.attributes 0 :
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{
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*(.ARM.attributes)
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}
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}

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