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fpistmfpistm
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system(f3) update STM32F3xx HAL Drivers to v1.5.9
Included in STM32CubeF3 FW v1.12.0 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 009eee7 commit 963b685

70 files changed

Lines changed: 4035 additions & 3579 deletions

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‎system/Drivers/STM32F3xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 123 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -361,7 +361,9 @@ extern "C" {
361361
#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || \
362362
defined(STM32L4S7xx) || defined(STM32L4S9xx)
363363
#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI
364-
#endif
364+
#elif defined(STM32L4P5xx) || defined(STM32L4Q5xx)
365+
#define DMA_REQUEST_PSSI DMA_REQUEST_DCMI_PSSI
366+
#endif /* STM32L4R5xx || STM32L4R9xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
365367

366368
#endif /* STM32L4 */
367369

@@ -472,7 +474,9 @@ extern "C" {
472474
#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
473475
#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
474476
#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
477+
#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5)
475478
#define PAGESIZE FLASH_PAGE_SIZE
479+
#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */
476480
#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
477481
#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
478482
#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
@@ -536,6 +540,10 @@ extern "C" {
536540
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
537541
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
538542
#endif /* STM32H7 */
543+
#if defined(STM32H7RS)
544+
#define FLASH_OPTKEY1 FLASH_OPT_KEY1
545+
#define FLASH_OPTKEY2 FLASH_OPT_KEY2
546+
#endif /* STM32H7RS */
539547
#if defined(STM32U5)
540548
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
541549
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
@@ -558,6 +566,9 @@ extern "C" {
558566
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
559567
#define OB_nBOOT0_SET OB_NBOOT0_SET
560568
#endif /* STM32U0 */
569+
#if defined(STM32H5)
570+
#define FLASH_ECC_AREA_EDATA FLASH_ECC_AREA_EDATA_BANK1
571+
#endif /* STM32H5 */
561572

562573
/**
563574
* @}
@@ -601,6 +612,15 @@ extern "C" {
601612
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
602613
#endif /* STM32G4 */
603614

615+
#if defined(STM32U5)
616+
617+
#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOAnalogBooster
618+
#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOAnalogBooster
619+
#define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection HAL_SYSCFG_EnableIOAnalogVoltageSelection
620+
#define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection HAL_SYSCFG_DisableIOAnalogVoltageSelection
621+
622+
#endif /* STM32U5 */
623+
604624
#if defined(STM32H5)
605625
#define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC
606626
#define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC
@@ -806,6 +826,21 @@ extern "C" {
806826
#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
807827
#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
808828
#endif /* STM32U5 */
829+
830+
#if defined(STM32WBA)
831+
#define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF
832+
#define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF
833+
#define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF
834+
#define GPIO_AF11_RF_IO1 GPIO_AF11_RF
835+
#define GPIO_AF11_RF_IO2 GPIO_AF11_RF
836+
#define GPIO_AF11_RF_IO3 GPIO_AF11_RF
837+
#define GPIO_AF11_RF_IO4 GPIO_AF11_RF
838+
#define GPIO_AF11_RF_IO5 GPIO_AF11_RF
839+
#define GPIO_AF11_RF_IO6 GPIO_AF11_RF
840+
#define GPIO_AF11_RF_IO7 GPIO_AF11_RF
841+
#define GPIO_AF11_RF_IO8 GPIO_AF11_RF
842+
#define GPIO_AF11_RF_IO9 GPIO_AF11_RF
843+
#endif /* STM32WBA */
809844
/**
810845
* @}
811846
*/
@@ -860,6 +895,10 @@ extern "C" {
860895
#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
861896
#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
862897

898+
#if defined(STM32F3) || defined(STM32G4) || defined(STM32H7)
899+
#define HRTIMInterruptResquests HRTIMInterruptRequests
900+
#endif /* STM32F3 || STM32G4 || STM32H7 */
901+
863902
#if defined(STM32G4)
864903
#define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig
865904
#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
@@ -997,8 +1036,8 @@ extern "C" {
9971036
#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0)
9981037
#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1)
9991038
#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)
1000-
10011039
#endif /* STM32F3 */
1040+
10021041
/**
10031042
* @}
10041043
*/
@@ -1249,10 +1288,10 @@ extern "C" {
12491288
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12501289
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12511290

1252-
#if defined(STM32H5) || defined(STM32H7RS)
1291+
#if defined(STM32H5) || defined(STM32H7RS) || defined(STM32N6)
12531292
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12541293
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1255-
#endif /* STM32H5 || STM32H7RS */
1294+
#endif /* STM32H5 || STM32H7RS || STM32N6 */
12561295

12571296
#if defined(STM32WBA)
12581297
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1264,27 +1303,27 @@ extern "C" {
12641303
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12651304
#endif /* STM32WBA */
12661305

1267-
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
1306+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)
12681307
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12691308
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1270-
#endif /* STM32H5 || STM32WBA || STM32H7RS */
1309+
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
12711310

1272-
#if defined(STM32F7)
1311+
#if defined(STM32F7) || defined(STM32WB)
12731312
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
12741313
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
1275-
#endif /* STM32F7 */
1314+
#endif /* STM32F7 || STM32WB */
12761315

12771316
#if defined(STM32H7)
12781317
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
12791318
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
12801319
#endif /* STM32H7 */
12811320

1282-
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)
1321+
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB)
12831322
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
12841323
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
12851324
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
12861325
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
1287-
#endif /* STM32F7 || STM32H7 || STM32L0 */
1326+
#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */
12881327

12891328
/**
12901329
* @}
@@ -1451,7 +1490,7 @@ extern "C" {
14511490
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
14521491
#endif
14531492

1454-
#if defined(STM32U5)
1493+
#if defined(STM32U5) || defined(STM32MP2)
14551494
#define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS
14561495
#define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK
14571496
#endif
@@ -1817,7 +1856,7 @@ extern "C" {
18171856
#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
18181857
#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
18191858

1820-
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) ((cmd == ENABLE)? \
1859+
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd) == ENABLE)? \
18211860
HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
18221861
HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
18231862

@@ -1878,7 +1917,11 @@ extern "C" {
18781917
#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
18791918
#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
18801919
#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
1881-
1920+
#if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1921+
#define PWR_PVM_USB PWR_PVM_ENABLE
1922+
#define PWR_FLAG_PVMOUSB PWR_FLAG_PVMOVDDIO2
1923+
#define PWR_FLAG_PVMO_USB PWR_FLAG_PVMO_VDDIO2
1924+
#endif /* STM32G0C1xx || STM32G0B1xx */
18821925
#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
18831926
#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
18841927
#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
@@ -1991,6 +2034,9 @@ extern "C" {
19912034

19922035
#define PWR_ALL_RAM_RUN_RETENTION_MASK PWR_ALL_RAM_RUN_MASK
19932036
#endif
2037+
#if defined (STM32H7RS)
2038+
#define PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO PWR_SMPS_1V8_SUPPLIES_EXT_VDD_SUPPLIES_LDO
2039+
#endif
19942040

19952041
/**
19962042
* @}
@@ -1999,12 +2045,12 @@ extern "C" {
19992045
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
20002046
* @{
20012047
*/
2002-
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
2048+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)
20032049
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
20042050
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
20052051
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
20062052
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
2007-
#endif /* STM32H5 || STM32WBA || STM32H7RS */
2053+
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
20082054

20092055
/**
20102056
* @}
@@ -2112,6 +2158,20 @@ extern "C" {
21122158
#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
21132159
#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
21142160

2161+
#if defined(STM32H7RS) || defined(STM32N6)
2162+
#define FMC_SWAPBMAP_DISABLE FMC_SWAPBANK_MODE0
2163+
#define FMC_SWAPBMAP_SDRAM_SRAM FMC_SWAPBANK_MODE1
2164+
#define HAL_SetFMCMemorySwappingConfig HAL_FMC_SetBankSwapConfig
2165+
#define HAL_GetFMCMemorySwappingConfig HAL_FMC_GetBankSwapConfig
2166+
#endif /* STM32H7RS || STM32N6 */
2167+
2168+
#if defined(STM32N6)
2169+
/* alias CMSIS */
2170+
#define CSI_PCR_PWRDOWN_Pos CSI_PCR_NPWRDOWN_Pos
2171+
#define CSI_PCR_PWRDOWN_Msk CSI_PCR_NPWRDOWN_Msk
2172+
#define CSI_PCR_PWRDOWN CSI_PCR_NPWRDOWN
2173+
#endif /* STM32N6 */
2174+
21152175
/**
21162176
* @}
21172177
*/
@@ -2197,6 +2257,15 @@ extern "C" {
21972257
#define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
21982258
#define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
21992259

2260+
#if defined (STM32L031xx) || defined (STM32L041xx) || \
2261+
defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || \
2262+
defined (STM32L062xx) || defined (STM32L063xx) || \
2263+
defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || \
2264+
defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) || \
2265+
defined (STM32L010x6) || defined (STM32L010x8) || defined (STM32L010xB)
2266+
#define ADC_EXTERNALTRIGCONV_T21_TRGO (ADC_EXTERNALTRIGCONV_T22_TRGO)
2267+
#endif
2268+
22002269
/**
22012270
* @}
22022271
*/
@@ -3638,7 +3707,11 @@ extern "C" {
36383707
#define RCC_PLLDIV_4 RCC_PLL_DIV4
36393708

36403709
#define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE
3710+
#define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK
3711+
#define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE
36413712
#define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG
3713+
3714+
36423715
#define RCC_MCO_NODIV RCC_MCODIV_1
36433716
#define RCC_MCO_DIV1 RCC_MCODIV_1
36443717
#define RCC_MCO_DIV2 RCC_MCODIV_2
@@ -3651,11 +3724,9 @@ extern "C" {
36513724
#define RCC_MCOSOURCE_NONE RCC_MCO1SOURCE_NOCLOCK
36523725
#define RCC_MCOSOURCE_LSI RCC_MCO1SOURCE_LSI
36533726
#define RCC_MCOSOURCE_LSE RCC_MCO1SOURCE_LSE
3654-
#define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK
36553727
#define RCC_MCOSOURCE_HSI RCC_MCO1SOURCE_HSI
36563728
#define RCC_MCOSOURCE_HSI14 RCC_MCO1SOURCE_HSI14
36573729
#define RCC_MCOSOURCE_HSI48 RCC_MCO1SOURCE_HSI48
3658-
#define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE
36593730
#define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK
36603731
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
36613732
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
@@ -3664,8 +3735,14 @@ extern "C" {
36643735
#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
36653736
#endif
36663737

3738+
#if defined(STM32C0)
3739+
#define RCC_LSEDRIVE_LOW RCC_LSEDRIVE_MEDIUMHIGH
3740+
#define RCC_LSEDRIVE_MEDIUMLOW RCC_LSEDRIVE_MEDIUMHIGH
3741+
#endif
3742+
36673743
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3668-
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
3744+
defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || \
3745+
defined(STM32U0)
36693746
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36703747
#else
36713748
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3914,10 +3991,7 @@ extern "C" {
39143991
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
39153992
* @{
39163993
*/
3917-
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
3918-
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3919-
defined (STM32WBA) || defined (STM32H5) || \
3920-
defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
3994+
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || defined (STM32U0) || defined (STM32U3)
39213995
#else
39223996
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39233997
#endif
@@ -4211,6 +4285,33 @@ extern "C" {
42114285

42124286
#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
42134287
#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
4288+
#if defined(STM32U5)
4289+
#define USB_OTG_GOTGCTL_BSESVLD USB_OTG_GOTGCTL_BSVLD
4290+
#define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINTMSK
4291+
#define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPC
4292+
#define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_PSRST
4293+
#define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_GONAKEFF
4294+
#define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUPINT
4295+
#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_IPXFRM_IISOOXFRM
4296+
#define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_CHNUM
4297+
#define USB_OTG_GLPMCFG_L1ResumeOK USB_OTG_GLPMCFG_L1RSMOK
4298+
#define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFSIZ
4299+
#define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MCNT
4300+
#define USB_OTG_HCCHAR_MC_0 USB_OTG_HCCHAR_MCNT_0
4301+
#define USB_OTG_HCCHAR_MC_1 USB_OTG_HCCHAR_MCNT_1
4302+
#define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERRM
4303+
#define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPNG
4304+
#define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OUTPKTERRM
4305+
#define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SD1PID_SODDFRM
4306+
#define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MCNT
4307+
#define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SD1PID_SODDFRM
4308+
#define USB_OTG_DOEPCTL_DPID USB_OTG_DOEPCTL_DPID_EONUM
4309+
#define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_RXDPID
4310+
#define USB_OTG_DOEPTSIZ_STUPCNT_0 USB_OTG_DOEPTSIZ_RXDPID_0
4311+
#define USB_OTG_DOEPTSIZ_STUPCNT_1 USB_OTG_DOEPTSIZ_RXDPID_1
4312+
#define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STPPCLK
4313+
#define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATEHCLK
4314+
#endif
42144315
/**
42154316
* @}
42164317
*/

‎system/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_can.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -621,10 +621,10 @@ typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to
621621
* @retval None
622622
*/
623623
#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
624-
((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
625-
(((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
626-
(((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
627-
(((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
624+
((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1UL << ((__FLAG__) & CAN_FLAG_MASK))): \
625+
(((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1UL << ((__FLAG__) & CAN_FLAG_MASK))): \
626+
(((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1UL << ((__FLAG__) & CAN_FLAG_MASK))): \
627+
(((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1UL << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
628628

629629
/**
630630
* @}

‎system/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_crc.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -308,8 +308,8 @@ void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
308308
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
309309
* @{
310310
*/
311-
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
312-
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
311+
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, const uint32_t pBuffer[], uint32_t BufferLength);
312+
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, const uint32_t pBuffer[], uint32_t BufferLength);
313313
/**
314314
* @}
315315
*/

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