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fix(xiao): address initial core review
1 parent 69d48fe commit c6bd5f4

8 files changed

Lines changed: 98 additions & 85 deletions

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‎boards.txt‎

Lines changed: 60 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2169,9 +2169,10 @@ GenC0.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.1={runtime.
21692169

21702170
################################################################################
21712171
# Seeed XIAO STM32C5
2172-
XIAO_STM32C5.name=Seeed XIAO STM32C5
2172+
XIAO_STM32C5.name=Seeed Studio
21732173

21742174
XIAO_STM32C5.build.core=arduino
2175+
XIAO_STM32C5.build.family=SEEED_STUDIO
21752176
XIAO_STM32C5.build.board=XIAO_STM32C5
21762177
XIAO_STM32C5.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)
21772178
XIAO_STM32C5.build.variant_h=variant_XIAO_STM32C5.h
@@ -2196,11 +2197,65 @@ XIAO_STM32C5.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C5
21962197
XIAO_STM32C5.vid.0=0x2886
21972198
XIAO_STM32C5.pid.0=0x80C5
21982199

2199-
# USB CDC is the user-facing default. The temporary None option permits
2200-
# non-USB phase-1 validation until C5 HAL v2 USB support is implemented.
2201-
XIAO_STM32C5.menu.usb.CDC=CDC (Serial)
2202-
XIAO_STM32C5.menu.usb.CDC.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC
2200+
# Seeed XIAO STM32C5
2201+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5=Seeed XIAO STM32C5
2202+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5.build.board=XIAO_STM32C5
2203+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5.build.product_line=STM32C5A3xx
2204+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)
2205+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5.build.variant_h=variant_XIAO_STM32C5.h
2206+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5.build.ldscript=ldscript_XIAO_STM32C5.ld
2207+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5.upload.maximum_size=1015808
2208+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5.upload.maximum_data_size=262144
2209+
XIAO_STM32C5.menu.pnum.XIAO_STM32C5.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C5A3.svd
2210+
2211+
# U(S)ART support
2212+
XIAO_STM32C5.menu.xserial.generic=Enabled (generic 'Serial')
2213+
XIAO_STM32C5.menu.xserial.none=Enabled (no generic 'Serial')
2214+
XIAO_STM32C5.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
2215+
XIAO_STM32C5.menu.xserial.disabled=Disabled (no Serial support)
2216+
XIAO_STM32C5.menu.xserial.disabled.build.xSerial=
2217+
2218+
# USB connectivity
22032219
XIAO_STM32C5.menu.usb.none=None
2220+
XIAO_STM32C5.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART)
2221+
XIAO_STM32C5.menu.usb.CDCgen.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC
2222+
XIAO_STM32C5.menu.usb.CDC=CDC (no generic 'Serial')
2223+
XIAO_STM32C5.menu.usb.CDC.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB
2224+
2225+
# Optimize
2226+
XIAO_STM32C5.menu.opt.osstd=Smallest (-Os default)
2227+
XIAO_STM32C5.menu.opt.oslto=Smallest (-Os) with LTO
2228+
XIAO_STM32C5.menu.opt.oslto.build.flags.optimize=-Os -flto
2229+
XIAO_STM32C5.menu.opt.o1std=Fast (-O1)
2230+
XIAO_STM32C5.menu.opt.o1std.build.flags.optimize=-O1
2231+
XIAO_STM32C5.menu.opt.o1lto=Fast (-O1) with LTO
2232+
XIAO_STM32C5.menu.opt.o1lto.build.flags.optimize=-O1 -flto
2233+
XIAO_STM32C5.menu.opt.o2std=Faster (-O2)
2234+
XIAO_STM32C5.menu.opt.o2std.build.flags.optimize=-O2
2235+
XIAO_STM32C5.menu.opt.o2lto=Faster (-O2) with LTO
2236+
XIAO_STM32C5.menu.opt.o2lto.build.flags.optimize=-O2 -flto
2237+
XIAO_STM32C5.menu.opt.o3std=Fastest (-O3)
2238+
XIAO_STM32C5.menu.opt.o3std.build.flags.optimize=-O3
2239+
XIAO_STM32C5.menu.opt.o3lto=Fastest (-O3) with LTO
2240+
XIAO_STM32C5.menu.opt.o3lto.build.flags.optimize=-O3 -flto
2241+
XIAO_STM32C5.menu.opt.ogstd=Debug (-Og)
2242+
XIAO_STM32C5.menu.opt.ogstd.build.flags.optimize=-Og
2243+
2244+
# Debug information
2245+
XIAO_STM32C5.menu.dbg.none=None
2246+
XIAO_STM32C5.menu.dbg.enable=Symbols Enabled (-g)
2247+
XIAO_STM32C5.menu.dbg.enable.build.flags.debug=-g
2248+
2249+
# C Runtime Library
2250+
XIAO_STM32C5.menu.rtlib.nano=Newlib Nano (default)
2251+
XIAO_STM32C5.menu.rtlib.nanofp=Newlib Nano + Float Printf
2252+
XIAO_STM32C5.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float
2253+
XIAO_STM32C5.menu.rtlib.nanofs=Newlib Nano + Float Scanf
2254+
XIAO_STM32C5.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float
2255+
XIAO_STM32C5.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
2256+
XIAO_STM32C5.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
2257+
XIAO_STM32C5.menu.rtlib.full=Newlib Standard
2258+
XIAO_STM32C5.menu.rtlib.full.build.flags.ldspecs=
22042259

22052260
################################################################################
22062261
# Generic C5

‎libraries/SPI/src/SPI.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,9 @@
1313

1414
SPIClass SPI;
1515

16-
void SPIClass::configSpi(const SPISettings &settings, bool force)
16+
void SPIClass::configSpi(const SPISettings &settings)
1717
{
18-
if (force || _spiSettings != settings) {
18+
if (_spiSettings != settings) {
1919
_spiSettings = settings;
2020

2121
uint32_t clock = settings.getClockFreq();
@@ -79,7 +79,7 @@ void SPIClass::begin(SPIBusMode busMode)
7979
SPI_MODE0,
8080
busMode
8181
);
82-
configSpi(defaultSettings, true);
82+
configSpi(defaultSettings);
8383
}
8484

8585
/**

‎libraries/SPI/src/SPI.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -135,7 +135,7 @@ class SPIClass : public HardwareSPI {
135135
/* Current SPISettings */
136136
SPISettings _spiSettings = SPISettings();
137137

138-
void configSpi(const SPISettings &settings, bool force = false);
138+
void configSpi(const SPISettings &settings);
139139
};
140140

141141
extern SPIClass SPI;

‎libraries/SPI/src/utility/spi_com.c‎

Lines changed: 1 addition & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -20,17 +20,6 @@
2020
extern "C" {
2121
#endif
2222

23-
#if defined(USE_HALV2_DRIVER)
24-
/* HAL v2 polling APIs use HAL_GetTick() for their timeout. On the current
25-
* Arduino C5 clock path that tick is not guaranteed to advance while polling,
26-
* so use the Arduino microsecond clock to bound LL polling instead. */
27-
static bool spi_transfer_timed_out(uint32_t start_us)
28-
{
29-
return (SPI_TRANSFER_TIMEOUT != HAL_MAX_DELAY)
30-
&& ((uint32_t)(micros() - start_us) >= (SPI_TRANSFER_TIMEOUT * 1000UL));
31-
}
32-
#endif
33-
3423
/* Private Functions */
3524
/**
3625
* @brief return clock freq of an SPI instance
@@ -575,22 +564,13 @@ spi_status_e spi_transfer(spi_t *obj, const uint8_t *tx_buffer, uint8_t *rx_buff
575564
{
576565
spi_status_e ret = SPI_OK;
577566
uint32_t tickstart, size = len;
578-
#if defined(USE_HALV2_DRIVER)
579-
uint32_t start_us;
580-
#endif
581-
if (obj == NULL || obj->spi == NP) {
582-
return SPI_ERROR;
583-
}
584567
SPI_TypeDef *_SPI = obj->spi;
585568
uint8_t *tx_buf = (uint8_t *)tx_buffer;
586569

587570
if (len == 0) {
588571
ret = SPI_ERROR;
589572
} else {
590573
tickstart = HAL_GetTick();
591-
#if defined(USE_HALV2_DRIVER)
592-
start_us = micros();
593-
#endif
594574

595575
#if defined(SPI_CR2_TSIZE)
596576
/* Start transfer */
@@ -601,32 +581,14 @@ spi_status_e spi_transfer(spi_t *obj, const uint8_t *tx_buffer, uint8_t *rx_buff
601581

602582
while (size--) {
603583
#if defined(SPI_SR_TXP)
604-
#if defined(USE_HALV2_DRIVER)
605-
while (!LL_SPI_IsActiveFlag_TXP(_SPI)) {
606-
if (spi_transfer_timed_out(start_us)) {
607-
ret = SPI_TIMEOUT;
608-
goto spi_transfer_end;
609-
}
610-
}
611-
#else
612584
while (!LL_SPI_IsActiveFlag_TXP(_SPI));
613-
#endif
614585
#else
615586
while (!LL_SPI_IsActiveFlag_TXE(_SPI));
616587
#endif
617588
LL_SPI_TransmitData8(_SPI, tx_buf ? *tx_buf++ : 0XFF);
618589

619590
#if defined(SPI_SR_RXP)
620-
#if defined(USE_HALV2_DRIVER)
621-
while (!LL_SPI_IsActiveFlag_RXP(_SPI)) {
622-
if (spi_transfer_timed_out(start_us)) {
623-
ret = SPI_TIMEOUT;
624-
goto spi_transfer_end;
625-
}
626-
}
627-
#else
628591
while (!LL_SPI_IsActiveFlag_RXP(_SPI));
629-
#endif
630592
#else
631593
while (!LL_SPI_IsActiveFlag_RXNE(_SPI));
632594
#endif
@@ -636,24 +598,17 @@ spi_status_e spi_transfer(spi_t *obj, const uint8_t *tx_buffer, uint8_t *rx_buff
636598
LL_SPI_ReceiveData8(_SPI);
637599
}
638600
if ((SPI_TRANSFER_TIMEOUT != HAL_MAX_DELAY) &&
639-
#if defined(USE_HALV2_DRIVER)
640-
(spi_transfer_timed_out(start_us))) {
641-
#else
642601
(HAL_GetTick() - tickstart >= SPI_TRANSFER_TIMEOUT)) {
643-
#endif
644602
ret = SPI_TIMEOUT;
645603
break;
646604
}
647605
}
648606

649607
#if defined(SPI_IFCR_EOTC)
650-
spi_transfer_end:
651608
// Add a delay before disabling SPI otherwise last-bit/last-clock may be truncated
652609
// See https://github.com/stm32duino/Arduino_Core_STM32/issues/1294
653610
// Computed delay is half SPI clock
654-
if (ret == SPI_OK) {
655-
delayMicroseconds(obj->disable_delay);
656-
}
611+
delayMicroseconds(obj->disable_delay);
657612

658613
/* Close transfer */
659614
/* Clear flags */

‎libraries/SrcWrapper/inc/stm32_def.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -203,11 +203,13 @@ __STATIC_INLINE void LL_RTC_SetBinMixBCDU(RTC_TypeDef *RTCx, uint32_t BinMixBcdU
203203
}
204204
#endif // STM32U0xx
205205

206-
/* STM32G0xx, STM32U0xx and some STM32U5xx defined USB_DRD_FS */
206+
/* Some STM32 series define USB_DRD_FS instead of the legacy USB instance. */
207207
#if !defined(USB) && defined(USB_DRD_FS)
208208
#define USB USB_DRD_FS
209209
#define PinMap_USB PinMap_USB_DRD_FS
210-
#if defined(STM32H5xx) || defined(STM32U0xx) ||\
210+
#if defined(STM32C5xx)
211+
#define USB_BASE USB_DRD_FS_BASE
212+
#elif defined(STM32H5xx) || defined(STM32U0xx) ||\
211213
defined(STM32U3xx) || defined(STM32U5xx)
212214
#define USB_BASE USB_DRD_BASE
213215
#if !defined(__HAL_RCC_USB_CLK_ENABLE)

‎libraries/USBDevice/inc/usbd_conf.h‎

Lines changed: 6 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -31,17 +31,15 @@ extern "C" {
3131

3232
#if defined(USE_HALV2_DRIVER)
3333
#if !defined(STM32C5xx)
34-
#error "USB library is not yet compatible with this HALv2 driver."
34+
#warning "USB device support is currently implemented only for STM32C5xx HAL v2."
35+
#endif
3536
#endif
3637

37-
/* STM32C5 uses the HAL v2 USB DRD FS PCD. Keep the legacy USB name and
38-
* PMA buffer-kind names available to the common endpoint configuration. */
39-
#define USB USB_DRD_FS
38+
#if defined(STM32C5xx)
4039
#define PCD_SNG_BUF HAL_PCD_SNG_BUF
4140
#define PCD_DBL_BUF HAL_PCD_DBL_BUF
42-
#define USB_IRQn USB_DRD_FS_IRQn
43-
#define USB_IRQHandler USB_DRD_FS_IRQHandler
44-
#else
41+
#endif
42+
4543
#if !defined(USB_BASE) && !defined(USB_OTG_DEVICE_BASE)
4644
#error "This board does not support USB! Select 'None' in the 'Tools->USB interface' menu"
4745
#endif
@@ -50,8 +48,6 @@ extern "C" {
5048
#endif
5149
#if !defined(USB_BASE) && !defined(USB_OTG_FS) && defined(USB_OTG_HS) && !defined(USE_USB_HS)
5250
#error "This board support only USB High Speed! Select 'High Speed' or 'High Speed in Full Speed mode' in the 'Tools->USB interface' menu"
53-
#endif
54-
5551
#endif
5652
#include <stdio.h>
5753
#include <stdlib.h>
@@ -87,7 +83,7 @@ extern "C" {
8783
#elif defined(STM32G0B1xx) || defined(STM32G0C1xx)
8884
#define USB_IRQn USB_UCPD1_2_IRQn
8985
#define USB_IRQHandler USB_UCPD1_2_IRQHandler
90-
#elif defined(STM32C0xx) || defined(STM32H5xx) || defined(STM32U0xx)
86+
#elif defined(STM32C0xx) || defined(STM32C5xx) || defined(STM32H5xx) || defined(STM32U0xx)
9187
#define USB_IRQn USB_DRD_FS_IRQn
9288
#define USB_IRQHandler USB_DRD_FS_IRQHandler
9389
#elif defined(STM32U5xx) && !defined(USB_DRD_FS)

libraries/USBDevice/src/usbd_conf_c5.c renamed to libraries/USBDevice/src/usbd_confv2.c

Lines changed: 21 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,15 @@
11
/**
22
******************************************************************************
3-
* @file usbd_conf_c5.c
4-
* @brief STM32C5 HAL v2 USB device low-level adapter.
3+
* @file usbd_confv2.c
4+
* @brief HAL v2 USB device low-level adapter.
55
******************************************************************************
66
*/
77

8-
#if defined(USBCON) && defined(USE_HALV2_DRIVER) && defined(STM32C5xx)
8+
#if defined(USBCON) && defined(USE_HALV2_DRIVER)
9+
10+
#if !defined(STM32C5xx)
11+
#warning "USB device support is currently implemented only for STM32C5xx HAL v2."
12+
#else
913

1014
#include "usbd_core.h"
1115
#include "usbd_if.h"
@@ -20,20 +24,19 @@ static USBD_HandleTypeDef *g_pdev;
2024
static uint8_t g_stalled_in;
2125
static uint8_t g_stalled_out;
2226

23-
static void USBD_C5_ErrorHandler(void)
27+
static void USBD_V2_ErrorHandler(void)
2428
{
2529
Error_Handler();
2630
}
2731

28-
static void USBD_C5_ConfigPinsAndIrq(void)
32+
static void USBD_V2_ConfigPinsAndIrq(void)
2933
{
30-
/* USB DRD FS owns PA11/PA12 and configures these fixed USB pins itself
31-
* during peripheral initialization. Do not configure a GPIO alternate
32-
* function here: C5 USB differs from the older USB device IPs. */
34+
/* The HAL v2 USB DRD FS PCD owns PA11/PA12 and configures these fixed USB
35+
* pins during peripheral initialization. */
3336

3437
HAL_RCC_USB_EnableClock();
35-
HAL_CORTEX_NVIC_SetPriority(USB_DRD_FS_IRQn, USBD_IRQ_PRIO, USBD_IRQ_SUBPRIO);
36-
HAL_CORTEX_NVIC_EnableIRQ(USB_DRD_FS_IRQn);
38+
HAL_CORTEX_NVIC_SetPriority(USB_IRQn, USBD_IRQ_PRIO, USBD_IRQ_SUBPRIO);
39+
HAL_CORTEX_NVIC_EnableIRQ(USB_IRQn);
3740
}
3841

3942
void HAL_PCD_SetupStageCallback(hal_pcd_handle_t *hpcd)
@@ -100,7 +103,7 @@ void HAL_PCD_DisconnectCallback(hal_pcd_handle_t *hpcd)
100103
USBD_LL_DevDisconnected(g_pdev);
101104
}
102105

103-
void USB_DRD_FS_IRQHandler(void)
106+
void USB_IRQHandler(void)
104107
{
105108
HAL_PCD_IRQHandler(&g_hpcd);
106109
}
@@ -119,24 +122,24 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
119122
};
120123

121124
USBD_reenumerate();
122-
USBD_C5_ConfigPinsAndIrq();
125+
USBD_V2_ConfigPinsAndIrq();
123126

124127
g_pdev = pdev;
125128
g_stalled_in = 0U;
126129
g_stalled_out = 0U;
127130
pdev->pData = &g_hpcd;
128131

129132
if (HAL_PCD_Init(&g_hpcd, HAL_PCD_DRD_FS) != HAL_OK) {
130-
USBD_C5_ErrorHandler();
133+
USBD_V2_ErrorHandler();
131134
}
132135
if (HAL_PCD_SetConfig(&g_hpcd, &config) != HAL_OK) {
133-
USBD_C5_ErrorHandler();
136+
USBD_V2_ErrorHandler();
134137
}
135138

136139
for (uint32_t i = 0U; i < (DEV_NUM_EP + 1U); i++) {
137140
if (HAL_PCD_PMAConfig(&g_hpcd, ep_def[i].ep_adress, ep_def[i].ep_kind,
138141
ep_def[i].ep_size) != HAL_OK) {
139-
USBD_C5_ErrorHandler();
142+
USBD_V2_ErrorHandler();
140143
}
141144
}
142145

@@ -146,7 +149,7 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
146149
USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev)
147150
{
148151
(void)pdev;
149-
HAL_CORTEX_NVIC_DisableIRQ(USB_DRD_FS_IRQn);
152+
HAL_CORTEX_NVIC_DisableIRQ(USB_IRQn);
150153
HAL_PCD_DeInit(&g_hpcd);
151154
HAL_RCC_USB_DisableClock();
152155
g_pdev = NULL;
@@ -248,4 +251,5 @@ void USBD_LL_Delay(uint32_t delay)
248251
HAL_Delay(delay);
249252
}
250253

251-
#endif /* USBCON && USE_HALV2_DRIVER && STM32C5xx */
254+
#endif /* STM32C5xx */
255+
#endif /* USBCON && USE_HALV2_DRIVER */

‎variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232
/* Alternate functions used by the default board peripherals. */
3333
#define PA9_ALT1 (PA9 | ALT1)
3434
#define PA10_ALT1 (PA10 | ALT1)
35+
#define PB15_ALT2 (PB15 | ALT2)
3536

3637
#define NUM_DIGITAL_PINS 21
3738
#define NUM_ANALOG_INPUTS 4
@@ -46,7 +47,7 @@
4647
#define PIN_SPI_SS1 NUM_DIGITAL_PINS
4748
#define PIN_SPI_SS2 NUM_DIGITAL_PINS
4849
#define PIN_SPI_SS3 NUM_DIGITAL_PINS
49-
#define PIN_SPI_MOSI (PB15 | ALT2)
50+
#define PIN_SPI_MOSI PB15_ALT2
5051
#define PIN_SPI_MISO PB0
5152
#define PIN_SPI_SCK PE2
5253

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