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variant(c5): add Nucleo-C562RE support
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent d28935c commit ee5346d

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‎boards.txt‎

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@@ -527,6 +527,22 @@ Nucleo_64.menu.pnum.NUCLEO_C092RC.build.st_extra_flags=-DSTM32C092xx {build.xSer
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Nucleo_64.menu.pnum.NUCLEO_C092RC.openocd.target=stm32c0x
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Nucleo_64.menu.pnum.NUCLEO_C092RC.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
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# NUCLEO_C562RE board
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Nucleo_64.menu.pnum.NUCLEO_C562RE=Nucleo C562RE
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Nucleo_64.menu.pnum.NUCLEO_C562RE.node="NOD_C562RE"
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Nucleo_64.menu.pnum.NUCLEO_C562RE.upload.maximum_size=524288
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Nucleo_64.menu.pnum.NUCLEO_C562RE.upload.maximum_data_size=131072
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Nucleo_64.menu.pnum.NUCLEO_C562RE.build.mcu=cortex-m33
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Nucleo_64.menu.pnum.NUCLEO_C562RE.build.fpu=-mfpu=fpv5-sp-d16
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Nucleo_64.menu.pnum.NUCLEO_C562RE.build.float-abi=-mfloat-abi=hard
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Nucleo_64.menu.pnum.NUCLEO_C562RE.build.hal=-DUSE_HALV2_DRIVER
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Nucleo_64.menu.pnum.NUCLEO_C562RE.build.board=NUCLEO_C562RE
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Nucleo_64.menu.pnum.NUCLEO_C562RE.build.series=STM32C5xx
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Nucleo_64.menu.pnum.NUCLEO_C562RE.build.product_line=STM32C562xx
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Nucleo_64.menu.pnum.NUCLEO_C562RE.build.variant=STM32C5xx/C552R(C-E)T_C562RET
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# Nucleo_64.menu.pnum.NUCLEO_C562RE.openocd.target=stm32c5x
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Nucleo_64.menu.pnum.NUCLEO_C562RE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C562.svd
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# NUCLEO_F030R8 board
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Nucleo_64.menu.pnum.NUCLEO_F030R8=Nucleo F030R8
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Nucleo_64.menu.pnum.NUCLEO_F030R8.node="NODE_F030R8,NUCLEO"

‎cmake/boards_db.cmake‎

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@@ -106025,6 +106025,85 @@ target_compile_options(NUCLEO_C092RC_xusb_HSFS INTERFACE
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"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
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)
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# NUCLEO_C562RE
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# -----------------------------------------------------------------------------
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set(NUCLEO_C562RE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C5xx/C552R(C-E)T_C562RET")
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set(NUCLEO_C562RE_MAXSIZE 524288)
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set(NUCLEO_C562RE_MAXDATASIZE 131072)
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set(NUCLEO_C562RE_MCU cortex-m33)
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set(NUCLEO_C562RE_FPCONF "fpv5-sp-d16-hard")
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add_library(NUCLEO_C562RE INTERFACE)
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target_compile_options(NUCLEO_C562RE INTERFACE
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"SHELL:-DUSE_HALV2_DRIVER"
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"SHELL:-DSTM32C562xx"
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"SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard"
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-mcpu=${NUCLEO_C562RE_MCU}
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)
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target_compile_definitions(NUCLEO_C562RE INTERFACE
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"STM32C5xx"
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"ARDUINO_NUCLEO_C562RE"
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"BOARD_NAME=\"NUCLEO_C562RE\""
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"BOARD_ID=NUCLEO_C562RE"
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"VARIANT_H=\"variant_NUCLEO_C562RE.h\""
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)
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target_include_directories(NUCLEO_C562RE INTERFACE
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${CMAKE_CURRENT_LIST_DIR}/../system/STM32C5xx
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Inc
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C5xx_HAL_Driver/Src
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Include/
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C5xx/Source/Templates/gcc/
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${NUCLEO_C562RE_VARIANT_PATH}
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)
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target_link_options(NUCLEO_C562RE INTERFACE
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"LINKER:--default-script=${NUCLEO_C562RE_VARIANT_PATH}/ldscript.ld"
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"LINKER:--defsym=LD_FLASH_OFFSET=0x0"
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"LINKER:--defsym=LD_MAX_SIZE=524288"
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"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
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"SHELL:-mfpu=fpv5-sp-d16 -mfloat-abi=hard"
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-mcpu=${NUCLEO_C562RE_MCU}
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)
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add_library(NUCLEO_C562RE_serial_disabled INTERFACE)
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target_compile_options(NUCLEO_C562RE_serial_disabled INTERFACE
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)
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add_library(NUCLEO_C562RE_serial_generic INTERFACE)
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target_compile_options(NUCLEO_C562RE_serial_generic INTERFACE
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"SHELL:-DHAL_UART_MODULE_ENABLED"
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)
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add_library(NUCLEO_C562RE_serial_none INTERFACE)
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target_compile_options(NUCLEO_C562RE_serial_none INTERFACE
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"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
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)
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add_library(NUCLEO_C562RE_usb_CDC INTERFACE)
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target_compile_options(NUCLEO_C562RE_usb_CDC INTERFACE
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"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
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)
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add_library(NUCLEO_C562RE_usb_CDCgen INTERFACE)
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target_compile_options(NUCLEO_C562RE_usb_CDCgen INTERFACE
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"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
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)
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add_library(NUCLEO_C562RE_usb_HID INTERFACE)
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target_compile_options(NUCLEO_C562RE_usb_HID INTERFACE
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"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
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)
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add_library(NUCLEO_C562RE_usb_none INTERFACE)
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target_compile_options(NUCLEO_C562RE_usb_none INTERFACE
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)
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add_library(NUCLEO_C562RE_xusb_FS INTERFACE)
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target_compile_options(NUCLEO_C562RE_xusb_FS INTERFACE
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)
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add_library(NUCLEO_C562RE_xusb_HS INTERFACE)
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target_compile_options(NUCLEO_C562RE_xusb_HS INTERFACE
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"SHELL:-DUSE_USB_HS"
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)
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add_library(NUCLEO_C562RE_xusb_HSFS INTERFACE)
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target_compile_options(NUCLEO_C562RE_xusb_HSFS INTERFACE
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"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
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)
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# NUCLEO_F030R8
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# -----------------------------------------------------------------------------
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‎variants/STM32C5xx/C552R(C-E)T_C562RET/CMakeLists.txt‎

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@@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
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generic_clock.c
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PeripheralPins.c
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variant_generic.cpp
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variant_NUCLEO_C562RE.cpp
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)
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target_link_libraries(variant_bin PUBLIC variant_usage)
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‎variants/STM32C5xx/C552R(C-E)T_C562RET/variant_NUCLEO_C562RE.cpp‎

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/*
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*******************************************************************************
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* Copyright (c) 2020-2026, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#if defined(ARDUINO_NUCLEO_C562RE)
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#include "pins_arduino.h"
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// Digital PinName array
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const PinName digitalPin[] = {
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PB_15, // D0
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PB_14, // D1
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PA_10, // D2
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PB_3, // D3
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PC_1, // D4/A6
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PB_4, // D5
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PB_10, // D6
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PA_8, // D7
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PA_9, // D8
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PC_6, // D9
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PC_9, // D10/A7
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PA_7, // D11/A8
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PA_6, // D12/A9
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PA_5, // D13
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PB_7, // D14
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PB_6, // D15
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PC_10, // D16
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PC_12, // D17
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PH_2, // D18
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PA_2, // D19/A15
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PA_3, // D20/A16
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PA_13, // D21
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PA_14, // D22
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PA_15, // D23
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PE_2, // D24
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PC_13, // D25
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PC_14, // D26
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PC_15, // D27
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PH_0, // D28
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PH_1, // D29
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PC_2, // D30/A10
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PC_3, // D31/A11
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PC_11, // D32
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PD_2, // D33
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PA_0, // D34/A0
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PA_1, // D35/A1
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PA_4, // D36/A2
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PB_0, // D37/A3
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PC_5, // D38/A4
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PC_0, // D39/A5
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PC_8, // D40
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PC_7, // D41
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PB_5, // D42
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PA_12, // D43
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PA_11, // D44
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PB_12, // D45
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PB_1, // D46/A12
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PB_2, // D47/A13
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PB_13, // D48
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PC_4, // D49/A14
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PB_8, // D50
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PB_9 // D51
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};
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// Analog (Ax) pin number array
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const uint32_t analogInputPin[] = {
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34, // A0, PA0
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35, // A1, PA1
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36, // A2, PA4
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37, // A3, PB0
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38, // A4, PC5
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39, // A5, PC0
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4, // A6, PC1
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11, // A7, PA7
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12, // A8, PA6
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13, // A9, PA5
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30, // A10, PC2
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31, // A11, PC3
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46, // A12, PB1
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47, // A13, PB2
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49, // A14, PC4
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19, // A15, PA2
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20 // A16, PA3
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};
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// ----------------------------------------------------------------------------
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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if (HAL_RCC_HSE_Enable(HAL_RCC_HSE_ON) != HAL_OK) {
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Error_Handler();
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}
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hal_rcc_psi_config_t config_psi;
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config_psi.psi_source = HAL_RCC_PSI_SRC_HSE;
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config_psi.psi_ref = HAL_RCC_PSI_REF_24MHZ;
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config_psi.psi_out = HAL_RCC_PSI_OUT_144MHZ;
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if (HAL_RCC_PSI_SetConfig(&config_psi) != HAL_OK) {
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Error_Handler();
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}
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if (HAL_RCC_PSIS_Enable() != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB busses clocks */
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hal_rcc_bus_clk_config_t config_bus;
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config_bus.hclk_prescaler = HAL_RCC_HCLK_PRESCALER1;
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config_bus.pclk1_prescaler = HAL_RCC_PCLK_PRESCALER1;
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config_bus.pclk2_prescaler = HAL_RCC_PCLK_PRESCALER1;
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config_bus.pclk3_prescaler = HAL_RCC_PCLK_PRESCALER4;
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if (HAL_RCC_SetBusClockConfig(&config_bus) != HAL_OK) {
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Error_Handler();
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}
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/** Frequency will be increased */
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HAL_FLASH_ITF_SetLatency(HAL_FLASH, HAL_FLASH_ITF_LATENCY_4);
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if (HAL_RCC_SetSYSCLKSource(HAL_RCC_SYSCLK_SRC_PSIS) != HAL_OK) {
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Error_Handler();
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}
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HAL_FLASH_ITF_SetProgrammingDelay(HAL_FLASH, HAL_FLASH_ITF_PROGRAM_DELAY_2);
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if (HAL_UpdateCoreClock() != HAL_OK) {
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Error_Handler();
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}
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/* Peripherals using PCLK3 (36 MHz):
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LPUART1
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*/
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/* Peripherals using HSIDIV3 (48 MHz):
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USB
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*/
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if (HAL_RCC_HSIDIV3_Enable() != HAL_OK) {
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Error_Handler();
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* ARDUINO_NUCLEO_C562RE */

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