11/**
22 ******************************************************************************
3- * @file usbd_conf_c5 .c
4- * @brief STM32C5 HAL v2 USB device low-level adapter.
3+ * @file usbd_confv2 .c
4+ * @brief HAL v2 USB device low-level adapter.
55 ******************************************************************************
66 */
77
8- #if defined(USBCON ) && defined(USE_HALV2_DRIVER ) && defined(STM32C5xx )
8+ #if defined(USBCON ) && defined(USE_HALV2_DRIVER )
9+
10+ #if !defined(STM32C5xx )
11+ #warning "USB device support is currently implemented only for STM32C5xx HAL v2."
12+ #else
913
1014#include "usbd_core.h"
1115#include "usbd_if.h"
@@ -20,20 +24,19 @@ static USBD_HandleTypeDef *g_pdev;
2024static uint8_t g_stalled_in ;
2125static uint8_t g_stalled_out ;
2226
23- static void USBD_C5_ErrorHandler (void )
27+ static void USBD_V2_ErrorHandler (void )
2428{
2529 Error_Handler ();
2630}
2731
28- static void USBD_C5_ConfigPinsAndIrq (void )
32+ static void USBD_V2_ConfigPinsAndIrq (void )
2933{
30- /* USB DRD FS owns PA11/PA12 and configures these fixed USB pins itself
31- * during peripheral initialization. Do not configure a GPIO alternate
32- * function here: C5 USB differs from the older USB device IPs. */
34+ /* The HAL v2 USB DRD FS PCD owns PA11/PA12 and configures these fixed USB
35+ * pins during peripheral initialization. */
3336
3437 HAL_RCC_USB_EnableClock ();
35- HAL_CORTEX_NVIC_SetPriority (USB_DRD_FS_IRQn , USBD_IRQ_PRIO , USBD_IRQ_SUBPRIO );
36- HAL_CORTEX_NVIC_EnableIRQ (USB_DRD_FS_IRQn );
38+ HAL_CORTEX_NVIC_SetPriority (USB_IRQn , USBD_IRQ_PRIO , USBD_IRQ_SUBPRIO );
39+ HAL_CORTEX_NVIC_EnableIRQ (USB_IRQn );
3740}
3841
3942void HAL_PCD_SetupStageCallback (hal_pcd_handle_t * hpcd )
@@ -100,7 +103,7 @@ void HAL_PCD_DisconnectCallback(hal_pcd_handle_t *hpcd)
100103 USBD_LL_DevDisconnected (g_pdev );
101104}
102105
103- void USB_DRD_FS_IRQHandler (void )
106+ void USB_IRQHandler (void )
104107{
105108 HAL_PCD_IRQHandler (& g_hpcd );
106109}
@@ -119,24 +122,24 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
119122 };
120123
121124 USBD_reenumerate ();
122- USBD_C5_ConfigPinsAndIrq ();
125+ USBD_V2_ConfigPinsAndIrq ();
123126
124127 g_pdev = pdev ;
125128 g_stalled_in = 0U ;
126129 g_stalled_out = 0U ;
127130 pdev -> pData = & g_hpcd ;
128131
129132 if (HAL_PCD_Init (& g_hpcd , HAL_PCD_DRD_FS ) != HAL_OK ) {
130- USBD_C5_ErrorHandler ();
133+ USBD_V2_ErrorHandler ();
131134 }
132135 if (HAL_PCD_SetConfig (& g_hpcd , & config ) != HAL_OK ) {
133- USBD_C5_ErrorHandler ();
136+ USBD_V2_ErrorHandler ();
134137 }
135138
136139 for (uint32_t i = 0U ; i < (DEV_NUM_EP + 1U ); i ++ ) {
137140 if (HAL_PCD_PMAConfig (& g_hpcd , ep_def [i ].ep_adress , ep_def [i ].ep_kind ,
138141 ep_def [i ].ep_size ) != HAL_OK ) {
139- USBD_C5_ErrorHandler ();
142+ USBD_V2_ErrorHandler ();
140143 }
141144 }
142145
@@ -146,7 +149,7 @@ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
146149USBD_StatusTypeDef USBD_LL_DeInit (USBD_HandleTypeDef * pdev )
147150{
148151 (void )pdev ;
149- HAL_CORTEX_NVIC_DisableIRQ (USB_DRD_FS_IRQn );
152+ HAL_CORTEX_NVIC_DisableIRQ (USB_IRQn );
150153 HAL_PCD_DeInit (& g_hpcd );
151154 HAL_RCC_USB_DisableClock ();
152155 g_pdev = NULL ;
@@ -248,4 +251,5 @@ void USBD_LL_Delay(uint32_t delay)
248251 HAL_Delay (delay );
249252}
250253
251- #endif /* USBCON && USE_HALV2_DRIVER && STM32C5xx */
254+ #endif /* STM32C5xx */
255+ #endif /* USBCON && USE_HALV2_DRIVER */
0 commit comments