feat(xiao): enable SPI3 pin mapping

Author: cumin777

variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.cpp

@@ -15,9 +15,9 @@ const PinName digitalPin[] = {
   PB_6,  // D5 / I2C1_SCL
   PA_9,  // D6 / USART1_TX
   PA_10, // D7 / USART1_RX
-  PA_15, // D8
-  PB_0,  // D9
-  PB_15, // D10
+  PE_2,  // D8 / SPI3_SCK
+  PB_0,  // D9 / SPI3_MISO
+  PB_15, // D10 / SPI3_MOSI
   PB_8,  // D11 / FDCAN1_RX
   PB_9,  // D12 / FDCAN1_TX
   PB_5,  // D13 / FDCAN2_RX

variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.h

@@ -13,7 +13,7 @@
 #define PB6                     5
 #define PA9                     6
 #define PA10                    7
-#define PA15                    8
+#define PE2                     8
 #define PB0                     9
 #define PB15                    10
 #define PB8                     11
@@ -36,15 +36,15 @@
   #define LED_BUILTIN           PB12
 #endif
 
-/* SPI is intentionally not advertised until the connector SPI route is fixed
- * and validated on production hardware. */
+/* SPI3: D8/SCK (PE2), D9/MISO (PB0), D10/MOSI (PB15).
+ * No board-default chip-select is assigned; sketches control device CS. */
 #define PIN_SPI_SS              NUM_DIGITAL_PINS
 #define PIN_SPI_SS1             NUM_DIGITAL_PINS
 #define PIN_SPI_SS2             NUM_DIGITAL_PINS
 #define PIN_SPI_SS3             NUM_DIGITAL_PINS
-#define PIN_SPI_MOSI            NUM_DIGITAL_PINS
-#define PIN_SPI_MISO            NUM_DIGITAL_PINS
-#define PIN_SPI_SCK             NUM_DIGITAL_PINS
+#define PIN_SPI_MOSI            PB15
+#define PIN_SPI_MISO            PB0
+#define PIN_SPI_SCK             PE2
 
 #define PIN_WIRE_SDA            PB7
 #define PIN_WIRE_SCL            PB6