Verilog/System Verilog support in Emacs lsp-mode

[sazam0]

how to configure Verilog/System Verilog to support in Emacs lsp-mode?

[SethGower]

https://github.com/suoto/hdl_checker#emacs

https://github.com/suoto/hdl_checker/wiki/HOWTO:-Setting-up-a-project

[sazam0]

it only uses vhdl-mode-hook, does it cover verilog and systemverilog by itself?