gowin-fpga

Open-source reverse engineering and firmware development for the FNIRSI 2C53T oscilloscope/multimeter/signal generator

Gowin tangmega138k Pro pci+ddr demo

AI agent skills + MegaMemory knowledge graph for CPLD (WinCUPL/CUPL) and FPGA (iCEstudio/Verilog) design — describe in natural language, get validated, compiled hardware

Infrared Decoder developed for GOW1N FPGA LV9QN88P C6/I5 in Verilog

A 6x6 int8 systolic array GEMM accelerator for the Sipeed Tang Nano 20K in VHDL. Features switchable weight- and output-stationary dataflows, UART control via Python driver, and simulation/verification.

Open-source RE toward Gowin GW1N-2 (IDCODE 0x0120681B) bitstream support in Project Apicula — for the FNIRSI 2C53T scope's FPGA.