3434 * With the latest GD32F firmware, this function is declared as static.
3535 */
3636#if defined(GD32F20X)
37- extern " C"
38- {
39- fmc_state_enum fmc_bank0_state_get (void );
40- fmc_state_enum fmc_bank1_state_get (void );
37+ extern " C" {
38+ fmc_state_enum fmc_bank0_state_get (void );
39+ fmc_state_enum fmc_bank1_state_get (void );
4140}
4241#endif
4342
4443#include " firmware/debug/debug_debug.h"
4544
46- namespace flashcode
47- {
45+ namespace flashcode {
4846/* Backwards compatibility with SPI FLASH */
4947static constexpr auto kFlashSectorSize = 4096U ;
5048/* The flash page size is 2KB for bank0 */
5149static constexpr auto kBanK0FlashPage = (2U * 1024U );
5250/* The flash page size is 4KB for bank1 */
5351static constexpr auto kBanK1FlashPage = (4U * 1024U );
5452
55- enum class State
56- {
57- IDLE ,
58- ERASE_BUSY ,
59- ERASE_PROGAM ,
60- WRITE_BUSY ,
61- WRITE_PROGRAM ,
62- ERROR
63- };
53+ enum class State { IDLE , ERASE_BUSY , ERASE_PROGAM , WRITE_BUSY , WRITE_PROGRAM , ERROR };
6454
6555static State s_state = State::IDLE ;
6656static uint32_t s_page;
@@ -70,17 +60,12 @@ static uint32_t* s_data;
7060static bool s_isBank0;
7161} // namespace flashcode
7262
73- bool static is_bank0 (const uint32_t page_address)
74- {
63+ bool static is_bank0 (const uint32_t page_address) {
7564 /* flash size is greater than 512k */
76- if (FMC_BANK0_SIZE < FMC_SIZE )
77- {
78- if (FMC_BANK0_END_ADDRESS > page_address)
79- {
65+ if (FMC_BANK0_SIZE < FMC_SIZE ) {
66+ if (FMC_BANK0_END_ADDRESS > page_address) {
8067 return true ;
81- }
82- else
83- {
68+ } else {
8469 return false ;
8570 }
8671 }
@@ -90,26 +75,22 @@ bool static is_bank0(const uint32_t page_address)
9075
9176using namespace flashcode ;
9277
93- uint32_t FlashCode::GetSize () const
94- {
78+ uint32_t FlashCode::GetSize () const {
9579 return FMC_SIZE * 1024U ;
9680}
9781
98- uint32_t FlashCode::GetSectorSize () const
99- {
82+ uint32_t FlashCode::GetSectorSize () const {
10083 return kFlashSectorSize ;
10184}
10285
103- bool FlashCode::Read (uint32_t offset, uint32_t length, uint8_t * pBuffer, flashcode::Result& result)
104- {
86+ bool FlashCode::Read (uint32_t offset, uint32_t length, uint8_t * pBuffer, flashcode::Result& result) {
10587 DEBUG_ENTRY ();
10688 DEBUG_PRINTF (" offset=%p[%d], len=%u[%d], data=%p[%d]" , offset, (((uint32_t )(offset) & 0x3 ) == 0 ), length, (((uint32_t )(length) & 0x3 ) == 0 ), pBuffer, (((uint32_t )(pBuffer) & 0x3 ) == 0 ));
10789
10890 const auto * pSrc = reinterpret_cast <uint32_t *>(offset + FLASH_BASE );
10991 auto * pDst = reinterpret_cast <uint32_t *>(pBuffer);
11092
111- while (length > 0 )
112- {
93+ while (length > 0 ) {
11394 *pDst++ = *pSrc++;
11495 length -= 4 ;
11596 }
@@ -120,24 +101,19 @@ bool FlashCode::Read(uint32_t offset, uint32_t length, uint8_t* pBuffer, flashco
120101 return true ;
121102}
122103
123- bool FlashCode::Erase (uint32_t offset, uint32_t length, flashcode::Result& result)
124- {
104+ bool FlashCode::Erase (uint32_t offset, uint32_t length, flashcode::Result& result) {
125105 DEBUG_ENTRY ();
126106 DEBUG_PRINTF (" State=%d" , static_cast <int >(s_state));
127107
128108 result = Result::kOk ;
129109
130- switch (s_state)
131- {
110+ switch (s_state) {
132111 case State::IDLE :
133112 s_page = offset + FLASH_BASE ;
134113 s_length = length;
135- if ((s_isBank0 = is_bank0 (s_page)))
136- {
114+ if ((s_isBank0 = is_bank0 (s_page))) {
137115 fmc_bank0_unlock ();
138- }
139- else
140- {
116+ } else {
141117 fmc_bank1_unlock ();
142118 }
143119 s_state = State::ERASE_BUSY ;
@@ -146,40 +122,28 @@ bool FlashCode::Erase(uint32_t offset, uint32_t length, flashcode::Result& resul
146122 return false ;
147123 break ;
148124 case State::ERASE_BUSY :
149- if (s_isBank0)
150- {
151- if (FMC_BUSY == fmc_bank0_state_get ())
152- {
125+ if (s_isBank0) {
126+ if (FMC_BUSY == fmc_bank0_state_get ()) {
153127 DEBUG_EXIT ();
154128 return false ;
155129 }
156- }
157- else
158- {
159- if (FMC_BUSY == fmc_bank1_state_get ())
160- {
130+ } else {
131+ if (FMC_BUSY == fmc_bank1_state_get ()) {
161132 DEBUG_EXIT ();
162133 return false ;
163134 }
164135 }
165136
166- if (s_isBank0)
167- {
137+ if (s_isBank0) {
168138 FMC_CTL0 &= ~FMC_CTL0_PER ;
169- }
170- else
171- {
139+ } else {
172140 FMC_CTL1 &= ~FMC_CTL1_PER ;
173141 }
174142
175- if (s_length == 0 )
176- {
177- if (s_isBank0)
178- {
143+ if (s_length == 0 ) {
144+ if (s_isBank0) {
179145 fmc_bank0_lock ();
180- }
181- else
182- {
146+ } else {
183147 fmc_bank1_lock ();
184148 }
185149 s_state = State::IDLE ;
@@ -192,25 +156,20 @@ bool FlashCode::Erase(uint32_t offset, uint32_t length, flashcode::Result& resul
192156 return false ;
193157 break ;
194158 case State::ERASE_PROGAM :
195- if (s_length > 0 )
196- {
159+ if (s_length > 0 ) {
197160 DEBUG_PRINTF (" s_page=%p" , s_page);
198161
199- if (s_isBank0)
200- {
162+ if (s_isBank0) {
201163 FMC_CTL0 |= FMC_CTL0_PER ;
202164 FMC_ADDR0 = s_page;
203165 FMC_CTL0 |= FMC_CTL0_START ;
204166
205167 s_length -= kBanK0FlashPage ;
206168 s_page += kBanK0FlashPage ;
207- }
208- else
209- {
169+ } else {
210170 FMC_CTL1 |= FMC_CTL1_PER ;
211171 FMC_ADDR1 = s_page;
212- if (FMC_OBSTAT & FMC_OBSTAT_SPC )
213- {
172+ if (FMC_OBSTAT & FMC_OBSTAT_SPC ) {
214173 FMC_ADDR0 = s_page;
215174 }
216175 FMC_CTL1 |= FMC_CTL1_START ;
@@ -225,12 +184,9 @@ bool FlashCode::Erase(uint32_t offset, uint32_t length, flashcode::Result& resul
225184 return false ;
226185 break ;
227186 case State::WRITE_BUSY :
228- if (s_isBank0)
229- {
187+ if (s_isBank0) {
230188 FMC_CTL0 &= ~FMC_CTL0_PG ;
231- }
232- else
233- {
189+ } else {
234190 FMC_CTL1 &= ~FMC_CTL1_PG ;
235191 }
236192 /* @fallthrough@*/
@@ -251,23 +207,18 @@ bool FlashCode::Erase(uint32_t offset, uint32_t length, flashcode::Result& resul
251207 return true ;
252208}
253209
254- bool FlashCode::Write (uint32_t offset, uint32_t length, const uint8_t * pBuffer, flashcode::Result& result)
255- {
210+ bool FlashCode::Write (uint32_t offset, uint32_t length, const uint8_t * pBuffer, flashcode::Result& result) {
256211 result = Result::kOk ;
257212
258- switch (s_state)
259- {
213+ switch (s_state) {
260214 case State::IDLE :
261215 DEBUG_PUTS (" State::IDLE" );
262216 s_address = offset + FLASH_BASE ;
263217 s_data = const_cast <uint32_t *>(reinterpret_cast <const uint32_t *>(pBuffer));
264218 s_length = length;
265- if ((s_isBank0 = is_bank0 (s_address)))
266- {
219+ if ((s_isBank0 = is_bank0 (s_address))) {
267220 fmc_bank0_unlock ();
268- }
269- else
270- {
221+ } else {
271222 fmc_bank1_unlock ();
272223 }
273224 s_state = State::WRITE_BUSY ;
@@ -276,40 +227,28 @@ bool FlashCode::Write(uint32_t offset, uint32_t length, const uint8_t* pBuffer,
276227 return false ;
277228 break ;
278229 case State::WRITE_BUSY :
279- if (s_isBank0)
280- {
281- if (FMC_BUSY == fmc_bank0_state_get ())
282- {
230+ if (s_isBank0) {
231+ if (FMC_BUSY == fmc_bank0_state_get ()) {
283232 DEBUG_EXIT ();
284233 return false ;
285234 }
286- }
287- else
288- {
289- if (FMC_BUSY == fmc_bank1_state_get ())
290- {
235+ } else {
236+ if (FMC_BUSY == fmc_bank1_state_get ()) {
291237 DEBUG_EXIT ();
292238 return false ;
293239 }
294240 }
295241
296- if (s_isBank0)
297- {
242+ if (s_isBank0) {
298243 FMC_CTL0 &= ~FMC_CTL0_PG ;
299- }
300- else
301- {
244+ } else {
302245 FMC_CTL1 &= ~FMC_CTL1_PG ;
303246 }
304247
305- if (s_length == 0 )
306- {
307- if (s_isBank0)
308- {
248+ if (s_length == 0 ) {
249+ if (s_isBank0) {
309250 fmc_bank0_lock ();
310- }
311- else
312- {
251+ } else {
313252 fmc_bank1_lock ();
314253 }
315254 s_state = State::IDLE ;
@@ -321,30 +260,21 @@ bool FlashCode::Write(uint32_t offset, uint32_t length, const uint8_t* pBuffer,
321260 return false ;
322261 break ;
323262 case State::WRITE_PROGRAM :
324- if (s_length >= 4 )
325- {
326- if (s_isBank0)
327- {
263+ if (s_length >= 4 ) {
264+ if (s_isBank0) {
328265 FMC_CTL0 |= FMC_CTL0_PG ;
329- }
330- else
331- {
266+ } else {
332267 FMC_CTL1 |= FMC_CTL1_PG ;
333268 }
334269 REG32 (s_address) = *s_data;
335270
336271 s_data++;
337272 s_address += 4 ;
338273 s_length -= 4 ;
339- }
340- else if (s_length > 0 )
341- {
342- if (s_isBank0)
343- {
274+ } else if (s_length > 0 ) {
275+ if (s_isBank0) {
344276 FMC_CTL0 |= FMC_CTL0_PG ;
345- }
346- else
347- {
277+ } else {
348278 FMC_CTL1 |= FMC_CTL1_PG ;
349279 }
350280 REG32 (s_address) = *s_data;
@@ -353,12 +283,9 @@ bool FlashCode::Write(uint32_t offset, uint32_t length, const uint8_t* pBuffer,
353283 return false ;
354284 break ;
355285 case State::ERASE_BUSY :
356- if (s_isBank0)
357- {
286+ if (s_isBank0) {
358287 FMC_CTL0 &= ~FMC_CTL0_PER ;
359- }
360- else
361- {
288+ } else {
362289 FMC_CTL1 &= ~FMC_CTL1_PER ;
363290 }
364291 /* @fallthrough@*/
0 commit comments