Skip to content

Commit bea3860

Browse files
vanvughtvanvught
committed
Add GCC startup/linker support for GD32F4xx
Import CMSIS GCC startup assembly, linker scripts, and newlib syscalls for GD32F405/407, GD32F425/427, GD32F450, and GD32F470 variants with multiple flash/RAM sizes. Update core headers/system clock code to add new device defines, IRQ coverage, 240MHz clock options, and firmware version API, and adjust build rules to use nosys specs, shared C++ flags, timestamp include, and explicit C/CPP object handling.
1 parent 816bf06 commit bea3860

24 files changed

Lines changed: 4596 additions & 123 deletions

‎firmware-template-gd32/Rules.mk‎

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -17,14 +17,17 @@ LIST=$(FAMILY).list
1717
MAP=$(FAMILY).map
1818
SIZE=$(FAMILY).size
1919
BUILD=build_gd32/
20-
2120
FIRMWARE_DIR=./../firmware-template-gd32/
2221

23-
DEFINES:=$(addprefix -D,$(DEFINES))
22+
PROJECT=$(notdir $(patsubst %/,%,$(CURDIR)))
23+
$(info $$PROJECT [${PROJECT}])
24+
25+
DEFINES:=$(addprefix -D,$(DEFINES)) -DCONFIG_NETWORK_MEMORY_BLOCKS=1
2426

2527
include ../common/make/gd32/Board.mk
2628
include ../common/make/gd32/Mcu.mk
2729
include ../common/make/gd32/Includes.mk
30+
include ../common/make/Timestamp.mk
2831
include ../common/make/gd32/Validate.mk
2932

3033
LIBS+=network superloop board gd32 clib
@@ -50,11 +53,9 @@ COPS+=-Os -nostartfiles -ffreestanding -nostdlib
5053
COPS+=-fstack-usage
5154
COPS+=-ffunction-sections -fdata-sections
5255
COPS+=-Wall -Werror -Wpedantic -Wextra -Wunused -Wsign-conversion -Wconversion -Wduplicated-cond -Wlogical-op
56+
COPS+=--specs=nosys.specs
5357

54-
CPPOPS=-std=c++20
55-
CPPOPS+=-Wnon-virtual-dtor -Woverloaded-virtual -Wnull-dereference -fno-rtti -fno-exceptions -fno-unwind-tables
56-
CPPOPS+=-Wuseless-cast -Wold-style-cast
57-
CPPOPS+=-fno-threadsafe-statics
58+
include ../common/make/CppOps.mk
5859

5960
LDOPS=--gc-sections --print-gc-sections --print-memory-usage
6061

@@ -63,12 +64,12 @@ PLATFORM_LIBGCC+= -L $(shell dirname `$(CC) $(COPS) -print-libgcc-file-name`)
6364
$(info $$PLATFORM_LIBGCC [${PLATFORM_LIBGCC}])
6465

6566
C_OBJECTS=$(foreach sdir,$(SRCDIR),$(patsubst $(sdir)/%.c,$(BUILD)$(sdir)/%.o,$(wildcard $(sdir)/*.c)))
66-
C_OBJECTS+=$(foreach sdir,$(SRCDIR),$(patsubst $(sdir)/%.cpp,$(BUILD)$(sdir)/%.o,$(wildcard $(sdir)/*.cpp)))
67+
CPP_OBJECTS+=$(foreach sdir,$(SRCDIR),$(patsubst $(sdir)/%.cpp,$(BUILD)$(sdir)/%.o,$(wildcard $(sdir)/*.cpp)))
6768
ASM_OBJECTS=$(foreach sdir,$(SRCDIR),$(patsubst $(sdir)/%.S,$(BUILD)$(sdir)/%.o,$(wildcard $(sdir)/*.S)))
6869

6970
BUILD_DIRS:=$(addprefix $(BUILD),$(SRCDIR))
7071

71-
OBJECTS:=$(ASM_OBJECTS) $(C_OBJECTS)
72+
OBJECTS:=$(strip $(ASM_OBJECTS) $(C_OBJECTS) $(CPP_OBJECTS))
7273

7374
define compile-objects
7475
$(BUILD)$1/%.o: $1/%.cpp
@@ -111,9 +112,6 @@ $(LIBDEP):
111112
# Build bin
112113
#
113114

114-
$(BUILD_DIRS) :
115-
mkdir -p $(BUILD_DIRS)
116-
117115
$(BUILD)startup_$(LINE).o : $(FIRMWARE_DIR)/startup_$(LINE).S
118116
$(AS) $(COPS) -D__ASSEMBLY__ -c $(FIRMWARE_DIR)/startup_$(LINE).S -o $(BUILD)startup_$(LINE).o
119117

‎lib-gd32/gd32f4xx/CMSIS/GD/GD32F4xx/Include/gd32f4xx.h‎

Lines changed: 43 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -2,62 +2,57 @@
22
\file gd32f4xx.h
33
\brief general definitions for GD32F4xx
44
5-
\version 2016-08-15, V1.0.0, firmware for GD32F4xx
6-
\version 2018-12-12, V2.0.0, firmware for GD32F4xx
7-
\version 2020-09-30, V2.1.0, firmware for GD32F4xx
5+
\version 2026-02-05, V3.3.3, firmware for GD32F4xx
86
*/
97

10-
/*
11-
Copyright (c) 2020, GigaDevice Semiconductor Inc.
8+
/* Copyright (c) 2012 ARM LIMITED
9+
Copyright (c) 2026, GigaDevice Semiconductor Inc.
1210
13-
Redistribution and use in source and binary forms, with or without modification,
14-
are permitted provided that the following conditions are met:
11+
All rights reserved.
12+
Redistribution and use in source and binary forms, with or without
13+
modification, are permitted provided that the following conditions are met:
14+
- Redistributions of source code must retain the above copyright
15+
notice, this list of conditions and the following disclaimer.
16+
- Redistributions in binary form must reproduce the above copyright
17+
notice, this list of conditions and the following disclaimer in the
18+
documentation and/or other materials provided with the distribution.
19+
- Neither the name of ARM nor the names of its contributors may be used
20+
to endorse or promote products derived from this software without
21+
specific prior written permission.
22+
*
23+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26+
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
27+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29+
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30+
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31+
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32+
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33+
POSSIBILITY OF SUCH DAMAGE.
34+
---------------------------------------------------------------------------*/
1535

16-
1. Redistributions of source code must retain the above copyright notice, this
17-
list of conditions and the following disclaimer.
18-
2. Redistributions in binary form must reproduce the above copyright notice,
19-
this list of conditions and the following disclaimer in the documentation
20-
and/or other materials provided with the distribution.
21-
3. Neither the name of the copyright holder nor the names of its contributors
22-
may be used to endorse or promote products derived from this software without
23-
specific prior written permission.
24-
25-
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26-
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27-
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28-
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29-
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30-
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31-
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32-
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33-
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
34-
OF SUCH DAMAGE.
35-
*/
36+
/* This file refers the CMSIS standard, some adjustments are made according to GigaDevice chips */
3637

3738
#ifndef GD32F4XX_H
3839
#define GD32F4XX_H
3940

40-
/* AvV BEGIN */
41-
#pragma GCC diagnostic push
42-
#pragma GCC diagnostic ignored "-Wunused-function"
43-
#pragma GCC diagnostic ignored "-Wunused-parameter"
44-
#pragma GCC diagnostic ignored "-Wconversion"
45-
#pragma GCC diagnostic ignored "-Wsign-conversion"
46-
#pragma GCC diagnostic ignored "-Wduplicated-cond"
47-
/* AvV END */
48-
4941
#ifdef __cplusplus
5042
extern "C" {
5143
#endif
5244

5345
/* define GD32F4xx */
54-
#if !defined (GD32F450) && !defined (GD32F405) && !defined (GD32F407)
46+
#if !defined (GD32F450) && !defined (GD32F405) && !defined (GD32F407) && !defined (GD32F470) && !defined (GD32F425) && !defined (GD32F427)
5547
/* #define GD32F450 */
5648
/* #define GD32F405 */
5749
/* #define GD32F407 */
50+
/* #define GD32F470 */
51+
/* #define GD32F425 */
52+
/* #define GD32F427 */
5853
#endif /* define GD32F4xx */
5954

60-
#if !defined (GD32F450) && !defined (GD32F405) && !defined (GD32F407)
55+
#if !defined (GD32F450) && !defined (GD32F405) && !defined (GD32F407) && !defined (GD32F470) && !defined (GD32F425) && !defined (GD32F427)
6156
#error "Please select the target GD32F4xx device in gd32f4xx.h file"
6257
#endif /* undefine GD32F4xx tip */
6358

@@ -96,8 +91,8 @@ OF SUCH DAMAGE.
9691

9792
/* GD32F4xx firmware library version number V1.0 */
9893
#define __GD32F4xx_STDPERIPH_VERSION_MAIN (0x03) /*!< [31:24] main version */
99-
#define __GD32F4xx_STDPERIPH_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */
100-
#define __GD32F4xx_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
94+
#define __GD32F4xx_STDPERIPH_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
95+
#define __GD32F4xx_STDPERIPH_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
10196
#define __GD32F4xx_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */
10297
#define __GD32F4xx_STDPERIPH_VERSION ((__GD32F4xx_STDPERIPH_VERSION_MAIN << 24)\
10398
|(__GD32F4xx_STDPERIPH_VERSION_SUB1 << 16)\
@@ -114,7 +109,8 @@ OF SUCH DAMAGE.
114109
typedef enum IRQn
115110
{
116111
/* cortex-M4 processor exceptions numbers */
117-
NonMaskableInt_IRQn = -14, /*!< 2 non maskable interrupt */
112+
NonMaskableInt_IRQn = -14, /*!< non maskable interrupt */
113+
HardFault_IRQn = -13, /*!< hard-fault interrupt */
118114
MemoryManagement_IRQn = -12, /*!< 4 cortex-M4 memory management interrupt */
119115
BusFault_IRQn = -11, /*!< 5 cortex-M4 bus fault interrupt */
120116
UsageFault_IRQn = -10, /*!< 6 cortex-M4 usage fault interrupt */
@@ -172,7 +168,7 @@ typedef enum IRQn
172168
TIMER7_Channel_IRQn = 46, /*!< TIMER7 channel capture compare interrupt */
173169
DMA0_Channel7_IRQn = 47, /*!< DMA0 channel7 interrupt */
174170

175-
#if defined (GD32F450)
171+
#if defined (GD32F450) || defined (GD32F470)
176172
EXMC_IRQn = 48, /*!< EXMC interrupt */
177173
SDIO_IRQn = 49, /*!< SDIO interrupt */
178174
TIMER4_IRQn = 50, /*!< TIMER4 interrupt */
@@ -214,9 +210,9 @@ typedef enum IRQn
214210
TLI_IRQn = 88, /*!< TLI interrupt */
215211
TLI_ER_IRQn = 89, /*!< TLI error interrupt */
216212
IPA_IRQn = 90, /*!< IPA interrupt */
217-
#endif /* GD32F450 */
213+
#endif /* GD32F450 and GD32F470 */
218214

219-
#if defined (GD32F405)
215+
#if defined (GD32F405) || defined (GD32F425)
220216
SDIO_IRQn = 49, /*!< SDIO interrupt */
221217
TIMER4_IRQn = 50, /*!< TIMER4 interrupt */
222218
SPI2_IRQn = 51, /*!< SPI2 interrupt */
@@ -247,9 +243,9 @@ typedef enum IRQn
247243
DCI_IRQn = 78, /*!< DCI interrupt */
248244
TRNG_IRQn = 80, /*!< TRNG interrupt */
249245
FPU_IRQn = 81, /*!< FPU interrupt */
250-
#endif /* GD32F405 */
246+
#endif /* GD32F405 and GD32F425 */
251247

252-
#if defined (GD32F407)
248+
#if defined (GD32F407) || defined (GD32F427)
253249
EXMC_IRQn = 48, /*!< EXMC interrupt */
254250
SDIO_IRQn = 49, /*!< SDIO interrupt */
255251
TIMER4_IRQn = 50, /*!< TIMER4 interrupt */
@@ -283,7 +279,7 @@ typedef enum IRQn
283279
DCI_IRQn = 78, /*!< DCI interrupt */
284280
TRNG_IRQn = 80, /*!< TRNG interrupt */
285281
FPU_IRQn = 81, /*!< FPU interrupt */
286-
#endif /* GD32F407 */
282+
#endif /* GD32F407 and GD32F427 */
287283

288284
} IRQn_Type;
289285

‎lib-gd32/gd32f4xx/CMSIS/GD/GD32F4xx/Include/system_gd32f4xx.h‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
*/
66

77
/* Copyright (c) 2012 ARM LIMITED
8+
Copyright (c) 2026, GigaDevice Semiconductor Inc.
89
910
All rights reserved.
1011
Redistribution and use in source and binary forms, with or without
@@ -41,6 +42,8 @@ extern "C" {
4142
#endif
4243

4344
#include <stdint.h>
45+
/* firmware version can be aquired by uncommenting the macro */
46+
#define __FIRMWARE_VERSION_DEFINE
4447

4548
/* system clock frequency (core clock) */
4649
extern uint32_t SystemCoreClock;
@@ -50,6 +53,10 @@ extern uint32_t SystemCoreClock;
5053
extern void SystemInit (void);
5154
/* update the SystemCoreClock with current core clock retrieved from cpu registers */
5255
extern void SystemCoreClockUpdate (void);
56+
#ifdef __FIRMWARE_VERSION_DEFINE
57+
/* get firmware version */
58+
extern uint32_t gd32f4xx_firmware_version_get(void);
59+
#endif /* __FIRMWARE_VERSION_DEFINE */
5360

5461
#ifdef __cplusplus
5562
}

0 commit comments

Comments
 (0)