fix: Fix last DRC error

Author: tuxuser

FACET.kicad_pcb

@@ -91136,6 +91136,14 @@
 		(net 86)
 		(uuid "47f8da6d-d94f-4717-987c-ac097c38950e")
 	)
+	(segment
+		(start 91.6625 117.4)
+		(end 90.8 117.4)
+		(width 0.3)
+		(layer "F.Cu")
+		(net 93)
+		(uuid "0e84a09c-a605-44a5-8eba-5e443ff7b318")
+	)
 	(segment
 		(start 81.1 105.4)
 		(end 80.265599 105.4)
@@ -91312,6 +91320,14 @@
 		(net 93)
 		(uuid "d7b8fda6-450b-4780-9aaa-9a8a81da5136")
 	)
+	(segment
+		(start 90.8 117.4)
+		(end 90.75 117.45)
+		(width 0.3)
+		(layer "F.Cu")
+		(net 93)
+		(uuid "dadf1ffd-a5a7-4664-9af4-e0ccae4b32c4")
+	)
 	(segment
 		(start 81.185 117.75)
 		(end 81.185 119.021414)
@@ -91723,6 +91739,14 @@
 		(net 93)
 		(uuid "a11dcb2b-d190-4832-95cb-79d2f1fdb889")
 	)
+	(via
+		(at 90.75 117.45)
+		(size 0.6)
+		(drill 0.3)
+		(layers "F.Cu" "B.Cu")
+		(net 93)
+		(uuid "a47ac8b8-007e-4dc4-9074-4107cec17e7a")
+	)
 	(via
 		(at 110.4 113.55)
 		(size 0.6)

FACET.kicad_prl

@@ -48,7 +48,7 @@
       "drc_exclusions",
       "shapes"
     ],
-    "visible_layers": "00000000_00000000_07fc12a0_fffffff7",
+    "visible_layers": "00000000_00000000_07febaa0_ffffff57",
     "zone_display_mode": 1
   },
   "git": {